Senior Design Verification Engineer - CPU / SoC

European Tech Recruit; Cambridge; On-site; GBP 65,000 - 90,000; Full time

Job summary

European Tech Recruit partners with a leading UK semiconductor employer to hire an experienced Design Verification Engineer for a permanent onsite role in Cambridge. You will validate micro-architectures and work with SOC Architects to ensure correctness before release.

The role focuses on building verification environments, creating coverage plans, and driving regressions with advanced metrics. Strong expertise in CPU topics and formal verification is essential.

Qualifications

• Extensive experience with CPU technologies and micro-architectures.
• Proven skills in Cache Coherence, Memory Ordering, Branch Prediction and Renaming.

Responsibilities

• Validate high-level system requirements and micro-architectural concepts with SOC Architects.
• Develop detailed Test and Coverage plans for CPU domains.
• Build scalable verification environments with Stimulus, Checkers, Assertions, Trackers.
• Rigorous regression and debugging of test failures to enable features under care.
• Report progress using metrics like functional coverage and bug density.

Skills

CPU architectures

SystemVerilog

UVM

RIS

Formal Verification

Cache Coherence

Branch Prediction

Silicon bring-up

Simulation tools

SOC

Education

Bachelor's degree in Electrical Engineering or related field

Tools

Simulators

Waveform viewers

Formal Proof Tools

Job description

We are currently partnered with an industry leading semiconductor giant in the UK looking to expand their team with an experienced Design Verification Engineer to join a high caliber team of engineers working on high-performance CPUs and SoC validation. In this role, you will work closely with Architects to prove the correctness of complex micro-architectures before they reach the hands of millions of global users.

This is a permanent position based in Cambridge - please note this is a full onsite role.

Key responsibilities for this Senior Design Verification Engineer position:

• Work with SOC Architects to validate high-level system requirements and micro-architectural concepts.
• Develop detailed Test and Coverage plans for specific functional domains within the CPU.
• Build scalable and portable verification environments, including Stimulus, Checkers, Assertions, and Trackers.
• Enable all features under your care through rigorous regressions and deep-dive debugging of test failures.
• Report progress using advanced metrics, including functional coverage and bug density.

Key requirements:

• Extensive experience working with CPU technologies with proven skills in domains such as Cache Coherence, Memory Ordering, Branch Prediction, Renaming, and Speculative Execution.
• Experience with Random Instruction Sequencing (RIS) at the Block and Subsystem levels.
• In-depth experience with Simulators, Waveform viewers, and Formal Proof Tools.
• Familiarity with Formal Verification, Assertions, and Silicon bring-up.

Keywords: CPU Verification / Design Verification / DV / SystemVerilog / UVM / Cache Coherence / Branch Prediction / Formal Verification / RIS / SOC / Assembly / Cambridge / Silicon Bring-up