Senior CPU Verification Engineer — Onsite Cambridge

MaC VC; Cambridge; On-site; GBP 90,000 - 130,000; Full time

Benefits offered by this job

Salary and equity potential

Maternity/Paternity Leave

Employee stock purchase scheme

Matching pension scheme

Education Assistance

Relocation and immigration support

Life, Medical, Travel Insurance

Well-being memberships

Bicycle purchase scheme

Employee clubs

Job summary

Qualcomm Technologies International Ltd in Cambridge is seeking a Senior CPU Verification Engineer to validate CPU and SoC micro-architectures, working with chip architects to ensure launch-ready designs.

You will develop verification methodologies, build DV environments, and lead verification activities with a focus on scalability and portability across environments. This role is onsite in Cambridge.

Qualifications

• Bachelor's degree in Science, Engineering, or related field with 2+ years of ASIC design/verification experience.
• Master's degree with 1+ year of ASIC experience or PhD may apply.
• References to years experience are indicative; equivalence considered if competencies shown.

Responsibilities

• Understand CPU/SoC concepts with Architects.
• Develop detailed test and coverage plans based on architecture.
• Create verification environments with stimuli, checkers, assertions, trackers and coverage.
• Prepare verification plans and testbenches for functional domains.
• Execute plans, perform bring-up and regressions, debug failures.
• Track DV progress using metrics like bugs and coverage.

Skills

CPU Verification

Micro-Processor Architecture

RIS testing

Team Leadership

Testbench development

Debug & regression

Education

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Tools

UVM/Verification

Simulators

Formal Proof Tools

Job description

Qualcomm Technologies International Ltd in Cambridge is seeking a Senior CPU Verification Engineer to validate CPU and SoC micro-architectures, working with chip architects to ensure launch-ready designs.

You will develop verification methodologies, build DV environments, and lead verification activities with a focus on scalability and portability across environments. This role is onsite in Cambridge.