Lead RISC-V CPU Verification Engineer (UK)

Codasip; West of England; On-site; GBP 55,000 - 75,000; Full time

Job summary

Codasip in the UK is seeking Verification Engineers to join our Cambridge or Bristol design centres to verify state-of-the-art RISC-V CPUs. You will own portions of the design, apply verification methodologies, and set high standards for a new platform.

Work with an international team across Europe, solve complex issues, and contribute to cutting-edge cyber-resilient architectures in a highly collaborative environment.

Qualifications

• Experience with functional processor verification methodologies (CPU/ASIC).
• Knowledge of CPU architectures or IP verification.
• Proficiency in SystemVerilog, Python, C++, Rust or similar languages.
• Ownership of verification for a design block.
• Proficient Linux skills for automation.
• Familiarity with version control (Git).
• Knowledge of RISC-V architecture is a plus.

Responsibilities

• Verify RISC-V processors and extensions.
• Develop verification solutions (test benches, stimulus generation, formal environments).
• Collaborate with engineers across the verification team to deliver end-to-end verification.
• Define verification strategies for blocks and subsystems; select appropriate tools.
• Review specifications from a verification perspective.
• Run simulations, debug issues, determine root causes.

Skills

Functional verification methodologies

CPU architectures

SystemVerilog

Python

C++

Rust

Linux automation

Analytical thinking

Team collaboration

Root cause analysis

Tools

Simulators

Test generation

Coverage collection

Gate-level simulation

Git

Version control tools

Job description

Codasip in the UK is seeking Verification Engineers to join our Cambridge or Bristol design centres to verify state-of-the-art RISC-V CPUs. You will own portions of the design, apply verification methodologies, and set high standards for a new platform.

Work with an international team across Europe, solve complex issues, and contribute to cutting-edge cyber-resilient architectures in a highly collaborative environment.