Hybrid Senior FPGA Firmware Architect

Thales Group; Crawley; Hybrid; GBP 65,000 - 90,000; Full time

Benefits offered by this job

Hybrid working

Job summary

Thales Group in Crawley, United Kingdom, is seeking a Senior Firmware Engineer to design and verify FPGA firmware for mission-critical electronic systems. The role involves architecting reusable firmware, collaborating with multi-disciplinary teams, and delivering quality solutions in a hybrid work setting.

You will work with VHDL/SystemVerilog, develop robust verification environments, and interface with systems and hardware engineers while contributing to architecture and verification

Qualifications

• Degree in Electronics or related discipline (BEng, MEng, EngD or PhD) is required.
• Experience in FPGA firmware design and verification in defence/aerospace contexts.
• Strong written and verbal communication skills.

Responsibilities

• Architect FPGA firmware designs for reuse, scalability and maintainability.
• Design FPGA firmware using VHDL or SystemVerilog.
• Verify FPGA firmware with test benches and simulation.
• Develop verification test benches, environments and methodologies.
• Collaborate with systems, software and hardware engineers to deliver complete electronic systems.
• Contribute to requirements definition, architecture, design, verification and validation.

Skills

FPGA firmware design

FPGA verification

VHDL

SystemVerilog

Written and verbal communication

Independent working

Education

Electronics degree (BEng/MEng/EngD/PhD)

Tools

Vivado

Quartus

ModelSim/QuestaSim

TCL

Python

Job description

Thales Group in Crawley, United Kingdom, is seeking a Senior Firmware Engineer to design and verify FPGA firmware for mission-critical electronic systems. The role involves architecting reusable firmware, collaborating with multi-disciplinary teams, and delivering quality solutions in a hybrid work setting.

You will work with VHDL/SystemVerilog, develop robust verification environments, and interface with systems and hardware engineers while contributing to architecture and verification