Hardware Verification Engineer - IP & Testbench Lead

Semiconductor Engineering; Cambridge; On-site; GBP 65,000 - 90,000; Full time

Job summary

Semiconductor Engineering is seeking a seasoned Design Verification designer to drive testbench development and test sequence creation for complex IPs. You will shape our technology portfolio with expertise and creativity.

You will create test plans for configurable IPs, write UVM/SystemVerilog code to implement testbenches, checkers, and scoreboards, and collaborate with software and design teams to validate interconnectivity across SoCs and chiplets.

Qualifications

• Experience building testbenches for complex IPs.
• Experience writing test sequences for IP interconnectivity across SoC or multi-chiplets.
• Strong debugging and coverage analysis skills.

Responsibilities

• Create test plans for highly configurable IPs providing interconnectivity between components across an SoC, chiplet, or multi-chiplet systems
• Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards
• Collaborate with software teams to define and implement configurable testbenches
• Work with design teams test plans, failure debug, coverage, etc.

Skills

Testbench design

Test sequences

IP verification

Tools

SystemVerilog

UVM

Job description

Semiconductor Engineering is seeking a seasoned Design Verification designer to drive testbench development and test sequence creation for complex IPs. You will shape our technology portfolio with expertise and creativity.

You will create test plans for configurable IPs, write UVM/SystemVerilog code to implement testbenches, checkers, and scoreboards, and collaborate with software and design teams to validate interconnectivity across SoCs and chiplets.