GPU Front-End Implementation Engineer

Apple, Inc.; Greater London; On-site; GBP 100,000 - 140,000; Full time

Job summary

Apple, Inc. is seeking a Front-End Implementation (Synthesis) Engineer to advance PPA optimisation for the netlist within the Apple Silicon GPU frontend.

You will collaborate closely with RTL and Physical design teams to deliver high-quality netlists and timing compliant designs for next‑gen GPUs. The role focuses on RTL->gate‑level path optimisations, timing and ECO-based improvements, and the integration of advanced synthesis techniques to meet performance and power targets in a fast-paced

Qualifications

• Bachelor's degree in Electrical Engineering.
• Proficient in Verilog and SystemVerilog and scripting languages.
• Experience with physical synthesis, including logic and PPA optimisation techniques.

Responsibilities

• Lead PPA optimisation of the netlist and collaborate with RTL and Physical design teams.
• Deliver key netlist quality milestones for your partition.
• Contribute to understanding and improving current design methodologies.
• Help deliver outstanding GPUs within Apple Silicon by driving efficient RTL solutions.
• Analyse critical paths and apply ECOs to timing for robust functionality.

Skills

Verilog

SystemVerilog

Scripting

Education

BSc in Electrical Engineering

Job description

Apple, Inc. is seeking a Front-End Implementation (Synthesis) Engineer to advance PPA optimisation for the netlist within the Apple Silicon GPU frontend.

You will collaborate closely with RTL and Physical design teams to deliver high-quality netlists and timing compliant designs for next‑gen GPUs. The role focuses on RTL->gate‑level path optimisations, timing and ECO-based improvements, and the integration of advanced synthesis techniques to meet performance and power targets in a fast-paced