FPGA Engineer - VHDL, Artix-7, Timing Closure

Platform Recruitment; Cambridge; In loco; GBP 65.000 - 95.000; Tempo pieno

Descrizione del lavoro

Platform Recruitment is seeking an Electronic FPGA Engineer in Cambridge to join a collaborative engineering culture. You will design FPGA logic in VHDL for Xilinx Artix-7 devices using Vivado and develop FSMs to control hardware interfaces.

You will also implement I2C/SPI drivers, write self-checking test benches, perform simulations, and bring-up hardware in lab settings, ensuring timing closure and robust documentation.

Competenze

• Degree in Electronic/Electrical Engineering or related discipline.
• Strong hands-on VHDL experience for FPGA design and verification.
• 3+ years FPGA development in a product or R&D environment.

Mansioni

• Design FPGA logic in VHDL for Xilinx Artix-7 devices using Vivado.
• Develop finite state machines to control hardware interfaces.
• Create low-level driver logic for I2C, SPI and other serial interfaces.
• Write self-checking test benches and run simulations.
• Perform hardware bring-up, lab testing, measurements, and debugging.
• Manage constraints, clocking, resets, and CDC analysis for timing closure.
• Contribute to requirements, architecture design and module specs.
• Maintain configuration management, documentation and traceability.

Conoscenze

VHDL

FPGA design

I2C/SPI interfaces

Timing constraints

CDC/metastability

Lab testing

Formazione

Degree in Electronic/Electrical Engineering or related

Strumenti

Vivado

Xilinx Artix-7

Descrizione del lavoro

Platform Recruitment is seeking an Electronic FPGA Engineer in Cambridge to join a collaborative engineering culture. You will design FPGA logic in VHDL for Xilinx Artix-7 devices using Vivado and develop FSMs to control hardware interfaces.

You will also implement I2C/SPI drivers, write self-checking test benches, perform simulations, and bring-up hardware in lab settings, ensuring timing closure and robust documentation.