Senior FPGA Engineer - Xilinx Artix-7 & VHDL Expert

CamWebDir

United Kingdom

A distancia

GBP 65.000 - 90.000

Jornada completa

14 días+

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Descripción de la vacante

HUBER+SUHNER Polatis is seeking an experienced FPGA engineer to design and verify VHDL-based logic for Artix-7 FPGAs using Vivado. You will develop deterministic FSMs, implement and validate low-level interfaces (I2C, SPI, UART), and drive tests from board bring-up to production readiness.

The role emphasizes hardware verification, timing closure, documentation, and cross-functional collaboration with electronics and software teams.

Formación

  • VHDL for FPGA design and verification required.

Responsabilidades

  • Design and implement FPGA logic in VHDL for FPGA devices with Artix-7 and Vivado.
  • Develop finite state machines to control hardware interfaces and protocols.
  • Create low-level driver logic for I2C and SPI, including initialisation and error handling.
  • Write and maintain test benches and perform functional/timing simulations.
  • Perform hardware bring-up, lab testing, and iterative debugging with timing constraints.
  • Manage constraints (XDC), clocking, resets and CDC analysis; achieve timing closure.
  • Contribute to requirements capture, architecture design, module specs, and DFT/DFM considerations.
  • Maintain configuration management (SVN) and traceability to requirements.
  • Produce design documentation: descriptions, interfaces, test procedures, change logs.
  • Participate in design/code reviews and support system integration and field teams.
  • Support FPGA flow improvements and test automation (Tcl/Python).

Conocimientos

VHDL
Xilinx Artix-7
Vivado
Finite State Machines
I2C
SPI
UART
Test Benches
Timing Closure
XDC
CDC
SVN
Tcl
Python
PCB knowledge
Documentation

Educación

Electronic/Electrical Engineering degree
Computer Engineering degree

Herramientas

Vivado
SVN
Tcl
Python

Descripción del empleo

HUBER+SUHNER Polatis is seeking an experienced FPGA engineer to design and verify VHDL-based logic for Artix-7 FPGAs using Vivado. You will develop deterministic FSMs, implement and validate low-level interfaces (I2C, SPI, UART), and drive tests from board bring-up to production readiness.

The role emphasizes hardware verification, timing closure, documentation, and cross-functional collaboration with electronics and software teams.

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