Digital IC Implementation Engineer — Tapeout & Sign-off Expert

Raspberry Pi Foundation

Cambridge

Sur place

GBP 70 000 - 110 000

Plein temps

14 jours+

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Un CV et une lettre de motivation personnalisés, prêts à envoyer.

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Avantages offerts par ce poste

Private medical insurance
Life assurance 4× base salary
Employer pension contributions 8%
Income protection 75% of base salary
Electric vehicle salary sacrifice

Résumé du poste

Raspberry Pi Foundation seeks a Digital IC Implementation engineer to join the ASIC team in Cambridge, working full-time on-site to deliver next-generation silicon. You will drive physical design from RTL to GDS, optimize timing, power and area, and mentor colleagues.

The role covers constraint development, UPF, floorplanning, CTS, STA and sign-off, with opportunities to influence all stages of the silicon flow from specification to production.

Qualifications

  • Extensive tapeout experience on advanced technology nodes.
  • Deep knowledge of modern place-and-route flows and methodologies.
  • Experience with full tapeout sign-off including Physical Verification, STA and Power Integrity.

Responsabilités

  • Contribute to physical design from RTL to GDS.
  • Set timing constraints, UPF rules and CTS.
  • Develop high-quality floorplans and power grid designs.
  • Collaborate on design discovery, ECO methodology and physical verification.
  • Mentor teammates and share knowledge.
  • Work on site in Cambridge office.

Connaissances

Multiple tapeouts
Place & route
Sign-off experience
Floorplanning
UPF constraints
Synthesis & RTL input
Power Integrity
Scripting/automation

Outils

Cadence implementation tool flow

Description du poste

Raspberry Pi Foundation seeks a Digital IC Implementation engineer to join the ASIC team in Cambridge, working full-time on-site to deliver next-generation silicon. You will drive physical design from RTL to GDS, optimize timing, power and area, and mentor colleagues.

The role covers constraint development, UPF, floorplanning, CTS, STA and sign-off, with opportunities to influence all stages of the silicon flow from specification to production.

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