Digital ASIC Design Engineer - High-Speed R&D Innovator

IC Resources; Cambridgeshire and Peterborough; On-site; GBP 60,000 - 90,000; Full time

Job summary

IC Resources is seeking a Digital Design Engineer to join a UK-based advanced R&D team working on next‑generation high‑speed communications and circuit architectures. The role blends hands‑on digital design with research, taking ideas from early concepts toward production silicon, and involves close collaboration with digital, physical design and mixed‑signal engineers.

Ideal candidates will have strong experience in digital ASIC design and RTL development, a background in high‑speed digital

Qualifications

• Strong experience in digital ASIC design and RTL development.
• Background in high speed digital design, SerDes or communications related technologies.
• Experience designing complex digital blocks in advanced CMOS technologies.
• Understanding of mixed signal interfaces or digital blocks interacting closely with analogue circuitry is desirable.
• An interest in researching new architectures and challenging established approaches.
• A collaborative, hands on approach to engineering.

Responsibilities

• Work closely with experienced engineers across digital, physical design and mixed signal disciplines to develop high performance communications technology.
• Investigate new architectures and take ideas from early concepts through towards production silicon.

Skills

Digital ASIC design

RTL development

High speed digital design

SerDes

CMOS processes

Mixed-signal interfaces

Job description

IC Resources is seeking a Digital Design Engineer to join a UK-based advanced R&D team working on next‑generation high‑speed communications and circuit architectures. The role blends hands‑on digital design with research, taking ideas from early concepts toward production silicon, and involves close collaboration with digital, physical design and mixed‑signal engineers.

Ideal candidates will have strong experience in digital ASIC design and RTL development, a background in high‑speed digital