Application Specific Integrated Circuit Design Engineer

IC Resources; London; Remote; GBP 40,000 - 60,000; Full time

Job summary

A leading semiconductor company is seeking an Application Specific Integrated Circuit Design Engineer to focus on end-to-end ASIC development. You will collaborate with cross-functional teams, design RTL code, and ensure compliance with specifications. Ideal candidates hold a degree in Electrical Engineering and possess strong skills in SystemVerilog and ASIC design principles. This role offers opportunities for significant contributions in a growing startup environment.

Qualifications

• Solid understanding of ASIC design principles and methodologies.
• Experience with end-to-end ASIC development including synthesis, floorplanning, and static timing analysis.

Responsibilities

• Collaborates with teams to define and implement ASIC architectures.
• Designs and develops RTL code using SystemVerilog and Verilog.
• Conducts design verification and ensures compliance with specifications.
• Participates in the integration and testing of ASICs.

Skills

SystemVerilog

Verilog

ASIC design principles

Problem-solving

Attention to detail

Education

Bachelor's or Master's degree in Electrical Engineering

Job description

Application Specific Integrated Circuit Design Engineer

Location: Cambridge or UK remote (UK residents only).

Overview

This is a hands-on technical role in a start-up with a focus on security, CHERI technology and RISC-V cores. The company has strong funding and leadership with extensive semiconductor experience. The role involves end-to-end ASIC development across the full ASIC flow, from RTL to GDSII, with emphasis on digital design and physical implementation.

Responsibilities

• Collaborates with cross-functional teams to define and implement ASIC architectures
• Designs and develops RTL code using SystemVerilog and Verilog
• Conducts design verification and ensures compliance with specifications
• Participates in the integration and testing of ASICs
• Contributes to the improvement of design methodologies and processes
• Integrate IPs, define constraints, and ensure timing, area, and power goals are met
• Work closely with RTL, verification, and DFT teams to ensure robust handoffs and convergence

Qualifications

• Holds a Bachelor's or Master's degree in Electrical Engineering or related field
• Solid understanding of ASIC design principles and methodologies
• Proficient in SystemVerilog, Verilog, and RTL design
• Familiarity with security-related applications and protocols is a plus
• Strong problem-solving skills and attention to detail
• Experience with end-to-end ASIC development (RTL through GDSII), including synthesis, DFT, floorplanning, place and route, static timing analysis, and tapeout support