DFT Engineer

Chipright; United Kingdom; Remote; GBP 55,000 - 75,000; Full time

Job summary

A leading semiconductor company in the United Kingdom is seeking a DFT Engineer with experience in implementing DFT on large SoC designs. Candidates should be proficient in ATPG implementations, particularly with Mentor Tessent TestKompress. Knowledge of JTAG/IJTAG and silicon bring-up experience is highly valued. This role offers an opportunity to work in a dynamic environment focusing on cutting-edge technologies.

Skills

Experience implementing DFT on large SoC designs

ATPG implementations using Mentor Tessent TestKompress

Implementation of Scan for stuck-at and At-speed ATPG

Experience with JTAG / IJTAG

Silicon Bring up experience

ATPG Architecture using Mentor Graphics Flow

Job description

We are looking for a DFT Engineer with the following skill sets:

• Experience implementing DFT on large SoC designs
• ATPG implementations using Mentor Tessent TestKompress and a fully hierarchical strategy
• Implementation of Scan for stuck-at and At-speed ATPG
• Experience with JTAG / IJTAG
• Silicon Bring up experience
• ATPG Architecture using Mentor Graphics Flow

Principal IC Digital Design Recruitment Specialist

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