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A leading company in the semiconductor sector seeks a Design Verification Engineer in Marlow, UK. The role involves verifying IPs for various systems and improving verification processes. Candidate should possess 5+ years of experience in functional verification, ideally with skills in System Verilog and UVM, and be a proactive team player. Opportunities for involvement in innovative projects and technical leadership are available.
Design Verification Engineer page is loaded
Your main responsibilities will be focused on verifying IPs for video, vision, control systems, and diagnostics for functional safety. You will work on improving the quality and efficiency of existing test benches and the validation processes and methodologies, subsequently implementing those changes to advance best practices for hardware verification.
Accountabilities include a full range of tasks within the verification cycle:
Working with designers, architects, and security experts to capture and document verification specifications
Improving verification environment and working closely with devops.
Creation of a validation methodology by adopting industry standard verification techniques
Creation and continuous improvement of testbench quality
Developing and closing test coverage
Owning reviews and testbench maintenance
Drive the development of future verification strategy and infrastructure.
Applicants must have the legal right to live and work in UK. This role is primarily open to candidates who hold UK citizenship or work authorization.
Essential Skills
5+ years of design verification experience.
Strong hands-on experience in functional verification of complex IP using System Verilog and UVM and developing reusable and scalable code.
Strong scripting skills (UNIX shell scripting as well as e.g. TCL, Perl).
Expert working knowledge of assertion-based verification.
Hands-on RTL Debug capability and strong problem-solving skills.
Experience with constrained-random verification including ownership of a suitably complex verification environment.
Familiarity with tools and processes for developing and conducting all aspects of the verification process.
Experience with continuous integration and automation systems (e.g. Jenkins)
Strong communication skills and ability to work well as part of a team.
Engineering mindset dedicated and focused approach to problem analysis and solving.
Being a self-starter and ability to estimate and plan your work
Desirable skills and experience
Knowledge of C/C++ based verification.
Experience with IP-XACT or similar descriptive formats
Formal Verification experience (for verification eng.).
Experience in media, video, imaging or display pipeline projects is desired
Understanding of control systems and functional safety
Technical leadership – managing, mentoring and coaching.
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