Design Verification Engineer

JR United Kingdom; Watford; On-site; GBP 40,000 - 65,000; Full time

Job summary

A leading company in the technology sector seeks a Design Verification Engineer in Watford, Hertfordshire. The role involves verifying CPU connectivity, writing test plans, and using advanced methodologies like UVM and System Verilog. Candidates should have a strong background in verification techniques and debugging. This position offers the chance to work on innovative design verification projects.

Qualifications

• Experience with CPU connectivity verification, coverage analysis.
• Proficiency in UVM and System Verilog methodologies.
• Ability to write test plans and debug test failures.

Responsibilities

• Verify CPU connectivity to IP blocks using various tools and methodologies.
• Develop tests and provide verification reports demonstrating all tests pass.
• Run regressions and file bug reports for failures.

Skills

Verification Techniques

C Code

UVM

System Verilog

Debugging

Job description

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Design Verification Engineer, Watford, Hertfordshire

Client: ALOIS Solutions

Location: Watford, Hertfordshire, United Kingdom

Job Category: Other

EU work permit required: Yes

Job Views:

1

Posted:

31.05.2025

Expiry Date:

15.07.2025

Job Description:

• Verify CPU connectivity to IP blocks (using ASM boot, C code, GNU toolchain)
• Write test plans, define test methodologies, develop test benches, write testcases, complete functional verification, and close coverage for all design blocks in the SoCs/Subsystems
• Run regressions, debug test failures, and file bug reports as needed
• Develop tests to meet functional and code coverage requirements based on analysis of coverage gaps
• Provide verification reports demonstrating all tests pass on the RTL
• Use methodologies including design checks, verification techniques with simulators and emulators: UVM, formal, Verilog/System Verilog testbenches, C, System Verilog, UVM testcases