Design Verification Engineer

TN United Kingdom; London; On-site; GBP 50,000 - 90,000; Full time

Job summary

Join a rapidly growing team at a leading GPU design center in the UK, where you will be at the forefront of innovation. As a Design Verification Engineer, you will leverage your expertise in verification languages and methodologies to ensure the functionality and performance of cutting-edge graphics cores. You will work collaboratively with design leads and architects to develop comprehensive verification plans, create test environments, and analyze coverage to enhance product quality. This role offers the chance to contribute to groundbreaking technology, making a significant impact in the world of graphics and computing. If you are passionate about pushing the boundaries of technology, this opportunity is for you!

Qualifications

• Expertise in verification languages and methodologies is essential.
• Strong background in computer architecture and ASIC/SOC designs.

Responsibilities

• Verify complex GPU designs using SystemVerilog and UVM.
• Develop verification plans and maintain test bench components.

Skills

SystemVerilog

UVM

C++

Python

OpenGL

OpenCL

Perl

Ruby

Communication Skills

Collaboration

Education

Bachelor's Degree in Computer Science or related field

Master's Degree in a related field

Tools

HDL Simulators

Waveform Viewers

Job description

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Summary:
Do your life’s best work here - with the whole world watching. Join a rapidly growing team at our UK GPU design centre. At Apple, new ideas and complex challenges have a way of becoming phenomenal products, services, and customer experiences very quickly. The Design Verification Engineer will be responsible for the pre-silicon RTL verification of blocks in low power embedded graphics cores. This includes a deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A strong computer architecture background, preferably in graphics, and a strong foundation in verification methodology will be used to close testing coverage with high confidence.

Key Qualifications:

1. Expertise with verification languages such as SystemVerilog, Specman or Vera and verification methodologies such as UVM/OVM is a plus.
2. Experience of working in complex ASIC or SOC designs.
3. Expertise with HDL simulators & waveform viewers.
4. Experience defining coverage space, writing coverage model, analyzing results.
5. Experience working under strict schedule deadlines with the ability to handle multiple priorities.
6. Graphics architecture and programming (OpenGL/OpenCL) highly desired. Strong knowledge of computer architecture, general purpose microprocessor and memory sub-system micro-architecture in lieu of graphics experience.
7. Experience with scripting languages like Python, Go, Perl or Ruby a plus.
8. Excellent communication skills and ability to collaborate.

Description:

Use SystemVerilog, UVM and C++ with industry leading simulation tools and methodologies to verify complex GPU designs. Develop verification plans in coordination with design leads and architects. Create and maintain verification test bench components and environments. Generate directed and directed random tests. Run simulations and debug design and environment issues. Build functional coverage points, analyze coverage, and improve test environment to target coverage holes. Build automated verification flows for block verification. Work with other block & core level engineers to ensure seamless verification flow.

Additional Requirements: