CPU Core RTL & Microarchitecture Engineer

Advanced Micro Devices, Inc; Cambourne; Hybrid; GBP 70,000 - 110,000; Full time

Benefits offered by this job

Benefits at a glance

Hybrid work model

Job summary

AMD is seeking a CPU Core MicroArchitect/RTL Design Engineer in the United Kingdom to help craft RTL for the next-generation core. You will work with a skilled team to shape microarchitecture, define high-level architecture, and contribute to the processor’s core pipeline, caches, and memory subsystem.

Join a collaborative, hybrid environment committed to cutting-edge technology and silicon bring-up. You’ll need strong knowledge of CPU architecture, RTL coding, and design verification to drive

Qualifications

• Bachelor's or Master's degree in computer engineering or electrical engineering.
• Strong understanding of modern CPU architecture and RTL design principles.
• Experience with design verification, synthesis, and timing closure.
• Proven ability to work in a team and communicate across hardware/software groups.

Responsibilities

• Execute RTL design and coding for core pipeline with focus on caches and memory subsystem.
• Collaborate with hardware and software teams to define high-level architecture.
• Help define microarchitecture for next-gen high-performance cores.
• Contribute to design verification, synthesis, power reduction, and timing closure.
• Post-silicon support to ensure successful bring-up.

Skills

CPU architecture

RTL design

Problem solving

Collaboration

Education

Bachelor's or Master's in computer engineering/Electrical Engineering

Tools

RTL design tools

Job description

AMD is seeking a CPU Core MicroArchitect/RTL Design Engineer in the United Kingdom to help craft RTL for the next-generation core. You will work with a skilled team to shape microarchitecture, define high-level architecture, and contribute to the processor’s core pipeline, caches, and memory subsystem.

Join a collaborative, hybrid environment committed to cutting-edge technology and silicon bring-up. You’ll need strong knowledge of CPU architecture, RTL coding, and design verification to drive