Chief Photonics Architect for Disposable Diagnostics

Merantix Capital; Greater London; Hybrid; GBP 110,000 - 170,000; Full time

Benefits offered by this job

Founder equity

Hybrid work

London-based team

Job summary

Merantix Capital in London seeks a senior photonics hardware lead who owns the photonic and detection stack from architecture through foundry to a working reader. You will decide which physics gambits ship and shape the early product.

You will work with a small founding team, translating design intent into manufacturable silicon, optimizing tape-out cadence, and collaborating with AI design tools. A PhD in silicon photonics and a proven PIC delivery track record are essential.

Qualifications

• PhD in silicon photonics or EE with demonstrable experience taking PIC designs to working silicon.
• Experience delivering multiple designs from layout to silicon at a commercial foundry.
• Strong understanding of photonic integration, photon-counting detection, and nano-optical components.

Responsibilities

• Own photonic and detection architecture for the disposable chip and reader.
• Lead foundry engagements, prototyping, yield, robustness and tolerance management.
• Drive the design loop with our multi-physics design engine and implement design-arounds.
• Integrate reader with opto-mechanical, thermal, and electronics for the cartridge.
• Manage risk, and help build the initial technical hires in micro-fluidics and instrumentation.

Skills

Silicon photonics

Photonic integration

Photon-counting detection

Hardware design

Simulation & optimization

Education

PhD in silicon photonics or EE

Tools

PIC

Foundry partnerships

Tapeout cadence

Job description

Merantix Capital in London seeks a senior photonics hardware lead who owns the photonic and detection stack from architecture through foundry to a working reader. You will decide which physics gambits ship and shape the early product.

You will work with a small founding team, translating design intent into manufacturable silicon, optimizing tape-out cadence, and collaborating with AI design tools. A PhD in silicon photonics and a proven PIC delivery track record are essential.