SoC Architect

European Tech Recruit; Guyancourt; Presencial; EUR 60.000 - 90.000; Jornada completa

Descripción de la vacante

European Tech Recruit is partnering with a global leader in semiconductor and wireless technology expanding its engineering organization in France, seeking experienced SoC professionals to join the growing team. The role centers on developing interconnect hardware IP, software tools, and NoC deployment for a diverse range of markets including mobile, automotive, data centre, IoT and connectivity.

You will collaborate with Architecture, Hardware, Software, Verification and Emulation teams to

Formación

• Master’s degree in Microelectronics, Computer Science or a related field.
• 5–10 years of solid experience in design, architecture and/or application engineering across the SoC/ASIC development cycle.
• Strong standard SoC knowledge, including multimedia IP, GPUs, multi-core CPU architectures, processors, caches, memory controllers and interconnects.

Responsabilidades

• Collaborate regularly with Architecture, Hardware, Software, Verification and Emulation teams to ensure the technology is used efficiently across SoCs.
• Contribute to defining interconnect requirements and configurations across various SoCs.
• Provide technical support for new solutions.
• Help resolve NoC microarchitecture and integration issues.
• Participate in defining new solutions and improvements to the technology.
• Develop in-depth technical materials and organise training for teams worldwide.

Conocimientos

SoC architecture

RTL design

Verification

NoC concepts

AXI/ACE/CHI protocols

Python scripting

Perl scripting

Debugging skills

Communication in French and English

Educación

Master’s degree in Microelectronics or related field

Herramientas

HDL simulators

Emulation platforms

Descripción del empleo

A global leader in semiconductor and wireless technology is expanding its engineering organisation in France and is looking for experienced SoC professionals to join its growing team.

The company develops some of the world’s most advanced semiconductor technologies, with its platforms powering products across mobile, automotive, data centre, IoT and connectivity markets. Its French engineering teams work closely with global R&D organisations on highly complex SoC technologies and next-generation silicon.

The team’s mission is to develop and deploy custom-built interconnect hardware IP, software tools, and exploration and verification methodologies, enabling SoC integration teams to efficiently assemble SoCs with the required Power, Performance and Area (PPA) characteristics.

The technology spans the complete SoC infrastructure, providing increased SoC performance while minimising integration costs. This work sits at the backbone of the SoC, interconnecting all major IP solutions.

The successful candidate will join the Solutions Deployment team, responsible for deploying and supporting Network-on-Chip (NoC) technology across a broad SoC portfolio spanning Mobile, Automotive, Servers, IoT and Connectivity.

This is a challenging position working with innovative technologies and collaborating with experts and users of the technology worldwide across SoC Architecture, Hardware and Software Design, Verification, Debug and Post-Silicon teams.

Responsibilities

• Collaborate regularly with highly skilled experts across Architecture, Hardware, Software, Verification and Emulation teams to ensure the technology is used efficiently across SoCs.
• Contribute to defining interconnect requirements and configurations across various SoCs.
• Provide technical support for new solutions.
• Help resolve NoC microarchitecture and integration issues.
• Participate in defining new solutions and improvements to the technology.
• Develop in-depth technical materials and organise training for teams worldwide.

Skills & Experience

• Strong understanding of the overall SoC development flow, including SoC architecture, RTL design and verification, SoC performance, DDR memory channels, physical implementation and silicon debug.
• Good knowledge of system-level features including memory mapping, MMUs, Quality of Service, cache infrastructure and security schemes.
• Strong analytical and debugging skills across simulation, emulation and silicon bring-up environments.
• Understanding of interconnect protocols including AHB, AXI, ACE, ACE-Lite and CHI, alongside NoC concepts.
• Python and Perl scripting.
• Ability to react quickly and adapt to change.
• Excellent communication skills (French and English).

Minimum Qualifications

• Master’s degree in Microelectronics, Computer Science or a related field.
• Preferably 5–10 years of solid experience in design, architecture and/or application engineering across the SoC/ASIC development cycle.
• Strong standard SoC knowledge, including multimedia IP, GPUs, multi-core CPU architectures, processors, caches, memory controllers and interconnects, alongside the associated design, integration and verification challenges.

Preferred Qualifications

One or more of the following would be a strong advantage:

• SoC high-speed protocols and chiplet architectures.
• Coherency protocols.

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