Senior Satellite Terminal Modem Architect

Eutelsat; Paris; Hybrid; EUR 110,000 - 170,000; Full time

Job summary

Eutelsat is seeking an experienced modem architect to become the technical authority on the physical layer of our next generation LEO/IRIS2 terminals. You will own platform requirements, model links, and challenge design choices with external partners, as the single‑chip modem module concept takes shape.

This founding role anchors an in‑house PHY capability. You will lead architecture reviews, define acceptance criteria, and drive consistency of the PHY across silicon generations while

Qualifications

• MSc or PhD in signal processing, digital communications, telecommunications or electronics.
• 12+ years in digital modem or wireless physical layer engineering, including responsibility for the algorithmic architecture or the technical acceptance of a product taken through silicon or FPGA to measured field performance.
• Deep expertise in synchronisation and estimation theory applied to real receivers: acquisition at low SNR, CFO and SFO estimation, timing recovery, phase tracking under phase noise, channel estimation and equalisation.
• Practical command of forward error correction: LDPC, turbo or polar decoding architectures, iteration and quantisation trade-offs, and their cost in cycles, memory and power.
• Hands-on experience of programmable PHY platforms and their SDKs: micro-kernel or kernel-library based signal processing, hardware abstraction layers over accelerators, and the bring-up of a PHY on a vendor development environment.

Responsibilities

• Master the platform hands-on: SDK and toolchain, micro-kernel architecture of the PHY, mapping onto signal units, scheduling and synchronisation across units, hardware abstraction layers over the FEC and signal processing engines, DMA fabric, interrupts and inter-processor communication. Build, modify, instrument and profile PHY code yourself.
• Own the terminal physical layer requirements and their traceability, from service and constellation constraints down to waveform, timing and modem parameters, and hold the specification stable through the programme.
• Assess and challenge the receive chain design: acquisition strategy and its performance below 0 dB Es/N0, CFO and SFO estimation, timing recovery, carrier phase tracking under composite LO and converter phase noise, channel estimation and interpolation, equalisation, soft demapping and LLR scaling, AGC dynamics, and the loop bandwidth and stability margins behind each of them.
• Verify the coding scheme and its operating point: code family and rate set, decoder mapping onto the FEC accelerator, iteration budget and early termination, LLR quantisation, and the actual position of the BLER waterfall and error floor relative to the capacity bound.
• Scrutinise the transmit chain: pulse shaping and spectral mask compliance, PAPR and crest factor reduction, digital pre‑distortion interface and training path, and the consistency of the EVM, ACLR, spurious and EIRP budgets from baseband to antenna aperture.
• Lead joint architecture and code reviews with partner engineering teams, arbitrate on technical merit, and secure that design rationale, models, documentation and know‑how land inside Eutelsat in a form our own engineers can use.

Job description

Eutelsat is seeking an experienced modem architect to become the technical authority on the physical layer of our next generation LEO/IRIS2 terminals. You will own platform requirements, model links, and challenge design choices with external partners, as the single‑chip modem module concept takes shape.

This founding role anchors an in‑house PHY capability. You will lead architecture reviews, define acceptance criteria, and drive consistency of the PHY across silicon generations while