Senior Analog Layout Engineer – High-Speed ASICs

Chipright; France; Sur place; EUR 90 000 - 120 000; Plein temps

Résumé du poste

Chipright seeks highly motivated Analog Layout Designers with high speed experience to work with our customer. The role involves designing analog layouts for high-performance blocks, debugging LVS/DRC issues, and collaborating with circuit designers to implement requested layouts.

Candidates should have a Bachelor’s degree in Electronics and 5–10 years of analog layout experience, with proficiency in Cadence Virtuoso and strong knowledge of electromigration, latch-up, and ESD considerations in

Qualifications

• Bachelor degree in Electronics or equivalent.
• 5–10 years of analog layout experience.
• Experience with high-speed analog blocks (ADC/DAC) is essential.
• Proficient analog layout skills; resolve electromigration, latch-up, ESD in sub-micron tech.
• GF 40nm CMOS or below experience.
• Ability to debug LVS/DRC errors independently.
• Ability to build electrical test bench and run electrical simulations is a plus.

Responsabilités

• Design analog layouts for high-speed blocks.
• Debug LVS/DRC errors and ensure layout correctness.
• Collaborate with circuit designers to meet requirements.
• Build/test benches and perform electrical simulations is a plus.

Connaissances

Analog Layout

High-speed design

Cadence Virtuoso

LVS/DRC debugging

Device matching

EM/EM

Power distribution

ESD

Formation

Bachelor's degree in Electronics

Outils

Cadence Virtuoso

Description du poste

Chipright seeks highly motivated Analog Layout Designers with high speed experience to work with our customer. The role involves designing analog layouts for high-performance blocks, debugging LVS/DRC issues, and collaborating with circuit designers to implement requested layouts.

Candidates should have a Bachelor’s degree in Electronics and 5–10 years of analog layout experience, with proficiency in Cadence Virtuoso and strong knowledge of electromigration, latch-up, and ESD considerations in