Senior Analog IC Layout Engineer – End-to-End Chip Design

Renesas Electronics Corp.

Valbonne

On-site

EUR 70,000 - 100,000

Full time

6 days ago
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Job summary

Renesas Electronics is seeking an experienced Layout Design Engineer to work on analog layout for DC-DC converters, controllers, and drivers. The role requires independent floorplanning and layout of analog cells with ownership of the design within schedule.

Candidates should have a Bachelor’s or Master’s in Electrical and Computer Engineering and 6+ years in analog layout, with strong CAD tool skills (Virtuoso XL, Calibre DRC/LVS/PEX), and proficiency in scripting languages.

Qualifications

  • Bachelor’s or Master’s degree in Electrical and Computer engineering.
  • 6+ years in Analog Layout Design and associated flows for DRC, LVS, Packaging.

Responsibilities

  • Experienced in all aspects of Analog layout design from block level to full chip with a demonstrated history in driving design innovation and best practices.
  • Should have the ability to work independently with little supervision to floorplan and layout typical analog circuits such as charge pumps, comparators, amplifiers, bandgaps, linear regulators etc take complete ownership to drive all aspects within the committed schedule.
  • Must have deep knowledge in floor planning, leaf cell layout and analog layout matching techniques along with designing for EM and reliability.
  • Must be a natural team player , will collaborate with cross layout teams over the world to deliver high quality layouts.

Skills

Analog layout design
Floor planning
Layout matching techniques
EM/reliability design
Cross-team collaboration

Education

Bachelor’s or Master’s degree in Electrical and Computer engineering

Tools

Virtuoso XL
Calibre DRC/LVS/PEX
PVS/R3D
Python/Perl/TCL scripting

Job description

Renesas Electronics is seeking an experienced Layout Design Engineer to work on analog layout for DC-DC converters, controllers, and drivers. The role requires independent floorplanning and layout of analog cells with ownership of the design within schedule.

Candidates should have a Bachelor’s or Master’s in Electrical and Computer Engineering and 6+ years in analog layout, with strong CAD tool skills (Virtuoso XL, Calibre DRC/LVS/PEX), and proficiency in scripting languages.

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