Senior Analog Design Lead, CMOS & Mixed‑Signal

Jobtailor; Toulouse; On-site; EUR 90,000 - 150,000; Full time

Job summary

Jobtailor is seeking a senior analog/mixed‑signal IC design lead in Toulouse. You will architect, design and verify analog blocks, and drive transistor‑level simulations.

You will collaborate with system architects, support layout and post‑layout verification, and mentor engineers while promoting best practices and continuous improvement in silicon development.

Qualifications

• Master's or PhD in Electrical Engineering, Microelectronics, or related field.
• Typically >15 years of experience in analog or mixed-signal IC design.
• Strong expertise in CMOS analog circuit design and analysis.
• Hands-on experience with Cadence Virtuoso, Spectre, and related environments.
• Proven track record of silicon development and product delivery.
• Solid understanding of device physics, noise, reliability, and design-for-manufacturing.

Responsibilities

• Lead the architecture, design, and verification of analog and mixed-signal blocks.
• Develop transistor-level designs and perform detailed simulations.
• Drive design reviews and risk assessments.
• Support layout, post-layout verification, silicon bring-up, and production ramp.
• Collaborate with system architects and cross-functional teams.
• Promote best practices and continuous improvement.
• Provide technical leadership and mentorship to engineers.

Skills

CMOS analog design

Technical leadership

Noise analysis

DFM considerations

Education

MS/PhD in EE

Tools

Cadence Virtuoso

Spectre

EDA Tools

Job description

• Lead the architecture, design, and verification of analog and mixed-signal blocks
• Develop transistor-level designs and perform detailed simulations
• Drive design reviews, technical risk assessments, and problem-solving activities
• Support layout implementation, post-layout verification, silicon bring-up, characterization, and production ramp activities
• Collaborate closely with system architects and cross-functional teams
• Define and promote best practices and continuous improvement initiatives
• Provide technical leadership and mentorship to engineers

Requirements

• Master's degree or PhD in Electrical Engineering, Microelectronics, or a related field
• Typically >15 years of experience in analog or mixed-signal IC design
• Strong expertise in CMOS analog circuit design and analysis
• Hands-on experience with industry-standard EDA tools such as Cadence Virtuoso, Spectre, and related simulation and verification environments
• Proven track record of successful silicon development and product delivery
• Strong understanding of semiconductor device physics, noise analysis, reliability, and design-for-manufacturing considerations

Core Competencies

Expertise in analog and mixed-signal IC design, with a strong focus on CMOS analog circuit design and analysis. Proven ability to lead technical teams, drive design reviews, and implement best practices in semiconductor development.

Highest-signal resume keywords

• CMOS Analog Circuit Design
• Transistor-Level Design
• Cadence Virtuoso
• Silicon Development
• Technical Leadership

ATS Optimization Keywords

Hard Skills

• Analog Circuit Design
• Mixed-Signal Design
• Device Physics
• Noise Analysis
• Design-for-Manufacturing

Soft Skills

• Problem-Solving
• Mentorship
• Collaboration

Industry Keywords

• Electrical Engineering
• Microelectronics
• Silicon Bring-Up
• Post-Layout Verification
• Production Ramp

Tools & Technologies

• Cadence Virtuoso
• Spectre
• EDA Tools