Senior RFIC Design Engineer

MACOM; Paris; Hybrid; EUR 100,000 - 140,000; Full time

Benefits offered by this job

On-site work

Job summary

MACOM is seeking a Senior RFIC Design Engineer to lead the development of next-generation RFICs using CMOS SOI technologies. Location is on-site.

The candidate will architect, design, validate, and support production releases of RF solutions for front-end modules and RF switching applications, mentoring junior engineers and driving complex development programs.

Qualifications

• Master's Degree or PhD in Electrical Engineering, Microelectronics, RF Engineering, or a related field.
• Minimum 8 years of RFIC design experience, including significant exposure to CMOS SOI technologies.
• Deep understanding of CMOS SOI device physics and RF advantages of SOI technologies.
• Proven track record of successful RFIC product tape-outs and production releases.
• Experience with RF simulation and design tools such as Cadence Virtuoso including EMX and Keysight ADS and RFpro.
• Experience designing products operating from sub-GHz frequencies up to mmWave bands.
• Familiarity with ESD, EMC, and ruggedized RF design techniques.
• Strong understanding of RF layout techniques, parasitic extraction, and electromagnetic coupling effects.
• Excellent analytical, debugging, and communication skills.

Responsibilities

• Lead the design and development of RF and mixed-signal integrated circuits in CMOS SOI technologies.
• Define RF architectures and translate system requirements into circuit-level specifications.
• Design and optimize RF building blocks including: LNA, RF switches.
• Design, simulate, and optimize analog building blocks including Bandgap references, LDOs, Bias circuits, Charge pumps, Protection and monitoring circuits.
• Drive RFIC integration, floorplanning, layout reviews, and post-layout verification.
• Analyze the impact of process variations, temperature, supply variation, and packaging effects on analogue and RF performance.
• Develop and execute comprehensive verification plans, including corner, Monte Carlo, and reliability simulations.
• Participate in silicon bring-up, RF characterization, debug, and performance optimization.
• Support customer engagements and application teams with technical expertise and product evaluations.
• Mentor junior RF engineers and contribute to the development of design methodologies and best practices.

Skills

RFIC design

CMOS SOI

RF simulation

Tape-outs

Education

Master's or PhD in Electrical Engineering

Tools

Cadence Virtuoso (EMX)

Keysight ADS

RFpro

Job description

MACOM (NASDAQ: MTSI) is a global leader in the design andmanufacture of advanced semiconductor products across a diverse range of endmarkets, including Data Centers, Telecommunications, Industrial and Aerospaceand Defense. We develop innovative, cutting-edge technologies andproducts across the spectrum of radio frequency (RF), microwave, millimeter wave,photonics and high-speed analog technologies. Our solutions support critical network infrastructureapplications like artificial intelligence, high performance computing,satellite communications, radar, unmanned aerial vehicles, medical equipment, testand measurement and advanced wireless networks.

MACOM has more than 75 years of expertise in semiconductor processdevelopment, wafer fabrication, circuit design, advanced packaging, systemsarchitecture and applications engineering. We are committed to our customers’success. We partner with customers to help solve their most challengingproblems by providing semiconductor solutions that are at the forefront of thehighest power, highest frequency and/or highest data rates.

Leading technologies, innovative products and drivenemployees. Come be a part of MACOM and help advance the next generation ofconnectivity infrastructure!

Job Description

• We are seeking a Senior RFIC Design Engineer to lead the development of next-generation RFICs using advanced CMOS SOI technologies.
• The successful candidate will be responsible for architecting, designing, validating, and supporting the production release of RF solutions for front-end modules, and RF switching applications.
• The ideal candidate combines deep technical expertise in SOI RFIC design with strong problem-solving skills, a passion for innovation, and the ability to lead complex development programs.
• Location: On-site.

Responsibilities

• Lead the design and development of RF and mixed-signal integrated circuits in CMOS SOI technologies.
• Define RF architectures and translate system requirements into circuit-level specifications.
• Design and optimize RF building blocks including: LNA, RF switches.
• Design, simulate, and optimize analog building blocks including Bandgap references, LDOs, Bias circuits, Charge pumps, Protection and monitoring circuits.
• Drive RFIC integration, floorplanning, layout reviews, and post-layout verification.
• Analyze the impact of process variations, temperature, supply variation, and packaging effects on analogue and RF performance.
• Develop and execute comprehensive verification plans, including corner, Monte Carlo, and reliability simulations.
• Participate in silicon bring-up, RF characterization, debug, and performance optimization.
• Support customer engagements and application teams with technical expertise and product evaluations.
• Mentor junior RF engineers and contribute to the development of design methodologies and best practices.

Qualifications

• Master's Degree or PhD in Electrical Engineering, Microelectronics, RF Engineering, or a related field.
• Minimum 8 years of RFIC design experience, including significant exposure to CMOS SOI technologies.
• Deep understanding of CMOS SOI device physics and RF advantages of SOI technologies.
• Proven track record of successful RFIC product tape-outs and production releases.
• Experience with RF simulation and design tools such as Cadence Virtuoso including EMX and Keysight ADS and RFpro.
• Experience designing products operating from sub-GHz frequencies up to mmWave bands.
• Familiarity with ESD, EMC, and ruggedized RF design techniques.
• Strong understanding of RF layout techniques, parasitic extraction, and electromagnetic coupling effects.
• Excellent analytical, debugging, and communication skills.