RISC-V CPU Integration Intern - Cache-Coherent Emulation

QUALCOMM, Inc.; Provence-Alpes-Côte d'Azur; On-site; EUR 13,000 - 20,000; Full time

Job summary

Qualcomm France S.A.R.L. invites an internal internship to join the emulation group at the Sophia Antipolis R&D NoC technology center.

The project focuses on integrating a RISC-V CPU into an RTL platform and connecting it to a cache-coherent interconnect, with boot code development and toolchain integration. You will compile and validate the platform using RTL simulators, then port it to Palladium or Veloce hardware emulators for further testing.

Qualifications

• Master’s degree in Microelectronics, Computer Science, or related field.
• 6-month internship duration.
• Experience with Verilog or VHDL preferred.
• Excellent communication in French and English.

Responsibilities

• Assist the emulation team in integrating the RISC-V CPU RTL.
• Develop or reuse boot code in C/assembly for the RISC-V CPU.
• Integrate the RISC-V toolchain into the existing software build flow.
• Run RTL simulations to validate CPU integration and boot code.

Skills

Communication (FR/EN)

Adaptability

Team collaboration

Education

Master’s degree in Microelectronics/CS

Tools

Verilog

VHDL

Job description

Qualcomm France S.A.R.L. invites an internal internship to join the emulation group at the Sophia Antipolis R&D NoC technology center.

The project focuses on integrating a RISC-V CPU into an RTL platform and connecting it to a cache-coherent interconnect, with boot code development and toolchain integration. You will compile and validate the platform using RTL simulators, then port it to Palladium or Veloce hardware emulators for further testing.