Remote Senior ML Accelerator Chip Integration Engineer

SPD Technology; France; Remote; EUR 90,000 - 130,000; Full time

Job summary

SPD Technology seeks a Senior Engineer to drive ML accelerator ASIC development, owning end-to-end hardware-software integration and validation across complex digital designs. You will bridge specification, design and verification teams, plus compiler and performance groups within the ML compute IP ecosystem.

Fully remote with flexible scheduling. We value collaboration and advanced technical excellence, delivering high-quality tapeouts for scalable AI applications in a global, remote-friendly

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent.
• At least 5 years of experience in two of: computer architecture, embedded firmware, ASIC design/verification, or IP integration.
• Experience in hardware/software integration and validation.
• Experience with RTL development, design verification, and evaluation.

Responsibilities

• Review chip specifications and designs, developing integration plans with software and system partners while coordinating hardware/software delivery.
• Lead the bringup of ML compute features, integrating and validating complex hardware/software designs, including third-party IPs.
• Execute hardware-software co-simulation methodologies leveraging RTL, emulation, and FPGA environments; use simulators and performance models.
• Design validation tests and microbenchmarks to verify IP functionality and performance; draft test plans with cross-functional teams.
• Own debug discussions with Design/DV/Software/Architecture teams and improve validation coverage toward tapeout readiness.

Skills

Computer architecture

Embedded firmware

ASIC design/verification

IP integration

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science

Tools

RTL

Emulation

FPGA

Job description

SPD Technology seeks a Senior Engineer to drive ML accelerator ASIC development, owning end-to-end hardware-software integration and validation across complex digital designs. You will bridge specification, design and verification teams, plus compiler and performance groups within the ML compute IP ecosystem.

Fully remote with flexible scheduling. We value collaboration and advanced technical excellence, delivering high-quality tapeouts for scalable AI applications in a global, remote-friendly