Internship Hybrid DRAM: Next-Gen ferroelectric memory for energy-constrained systems-Grenoble-H/F

CEA; Grenoble; On-site; EUR 12,000 - 17,000; Full time

Benefits offered by this job

Possibilité de thèse financée

Job summary

Le CEA, Laboratoire LFIM à Grenoble, propose un stage hybride sur une mémoire DRAM hybride utilisant une oxydation hafnium-zirconium pour des systèmes à faible énergie. Vous concevrez et évaluerez des blocs circuits critiques d’un sous-ensemble mémoire, avec des outils de conception et de simulation courants.

Environnement de recherche de haut niveau avec publication potentielle et possibilité de poursuite en thèse financée.

Qualifications

• Ce stage s’adresse à des étudiant(e)s en dernière année de Master ou diplôme d’ingénieur, idéalement en électronique, microélectronique ou systèmes embarqués.
• Bonnes compétences en conception de circuits et en SPICE, et compréhension des hiérarchies mémoire et des principes basse consommation.
• Possibilité que le stage ouvre sur une thèse financée et, ensuite, un poste de thèse possible.

Responsibilities

• Conception et évaluation de blocs critiques d’un sous‑réseau mémoire, tels que sense amplifiers et chemins de timing de réplica.
• Évaluation des performances en timing, consommation d’énergie et stabilité opérationnelle.
• Utilisation d’outils de conception et de simulation industriels standard.

Skills

Conception de circuits

SPICE/Simulation

Architecture mémoire

Conception basse puissance

Education

Master en dernière année, ingénierie

Tools

Schematic capture

Job description

Internship Hybrid DRAM: Next-Gen ferroelectric memory for energy-constrained systems-Grenoble-H/F

Domaine

Contrat

Stage

Internship Hybrid DRAM: Next-Gen ferroelectric memory for energy-constrained systems-Grenoble-H/F

The objective of this internship is to investigate and design the critical circuit building blocks of a hybrid DRAM. This memory supports two storage modes: volatile and persistent. This dual functionality is enabled by ferroelectric technology, which allows information to be stored either as remanent polarization for non-volatile operation or as electrical charge for volatile operation. The results will guide the development of next-generation hybrid memory architectures for applications with stringent energy constraints.

As an intern at the CEA, you will have the opportunity to work within a world-renowned research environment. Our teams consist of passionate and dedicated experts, providing an ideal setting for learning and collaboration. You will have access to state-of-the-art equipment and top-tier research resources to carry out your assignments. The work conducted may potentially lead to a scientific publication.

Context :

Hafnium–zirconium oxide (HZO) ferroelectric stacks enable the development of highly scalable memories compatible with CMOS fabrication processes. These technologies offer the potential for integration densities comparable to those of DRAM, while supporting both volatile and non-volatile operating modes.

What do we expect from you?

The objective of this internship is to assess the potential of these hybrid memories for energy-constrained systems through the design and evaluation of critical circuit blocks. This work will contribute to establishing a design basis for future hybrid memory architectures.

During the internship, the student will design circuits of key building blocks of a memory subarray, such as sense amplifiers and replica timing paths, using industry-standard circuit design and simulation tools. The resulting circuits will be evaluated in terms of timing performance, power and energy consumption, and operating stability.

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Desired skills and experience

This internship is intended for students in the final year of a Master’s degree or engineering programme, preferably with a background in electronics, microelectronics, or embedded systems.

Solid circuit design skills, particularly in schematic capture and SPICE simulation and language, are desirable, together with a good understanding of memory hierarchies and low-power design principles.

The internship can form the basis of a PhD’s thesis. A funded PhD position will subsequently be available, offering an opportunity to continue this research.

Site

Grenoble

Grenoble

Langues

Oui

01/02/2027

Référence

2026-42461

The Laboratory for Innovative Functions for Mixed-Signal Circuits (LFIM) is tasked with the study and design of digital and mixed-signal electronic circuits that meet requirements for energy efficiency, compact size, real-time operation, and operational reliability. These circuits are applied in a wide range of systems and fields, such as high-performance computing architectures and low-power embedded systems—areas that now converge in the context of quantum computing, where a cryogenic environment imposes conflicting demands regarding performance and power dissipation. The technologies developed within the laboratory leverage the latest advancements in nanoelectronics. The LFIM studies, designs, and integrates digital and mixed-signal processing architectures onto silicon to address application needs in areas including high-performance computing, the Internet of Things (IoT), radio-frequency (RF) circuits, and cyber-physical systems.