FPGA Design Engineer - Hardware

Inria Rennes; Rennes; On-site; EUR 45,000 - 65,000; Full time

Job summary

Inria Rennes, TARAN team, seeks an FPGA hardware design engineer to design and verify complex digital systems using FPGAs for hardware prototypes, including AI accelerators and security-oriented IP. You will participate in the full design flow, from microarchitecture to back-end verification, collaborating with researchers across architecture, verification, and performance analysis.

You will work on implementing FPGA architectures, developing synthesizable RTL, performing timing analysis, and

Qualifications

• Graduated from a University or Engineering School in Computer Science, Computer Engineering or Electronic/Electrical Engineering.
• Solid understanding of SoC/FPGA design methodologies and techniques with hands-on experience for complex SoC
• Experience in RTL design using Verilog, SystemVerilog or VHDL
• Knowledge of at least one full FPGA implementation flow

Responsibilities

• Define FPGA architecture and develop synthesizable RTL (VHDL or SV) for communication protocols, memory controllers and AI accelerators.
• Develop testbenches and simulations to verify designs.
• Perform static timing analysis and timing closure for tight real-time constraints and multiple clock domains.
• Board bring-up, system integration, and debugging with oscilloscopes and analyzers.
• Create and maintain FPGA specifications, timing budgets, and interface definitions.

Skills

SoC/FPGA design

RTL coding (Verilog SV VHDL)

SystemVerilog

VHDL

Back-end design (place & routing)

FPGA implementation flow

Education

Engineering degree in CS/CE/EE

Tools

Placement & routing tools

AMBA protocol (AXI/AHB/CHI)

Job description

Context

The TARAN team at Inria and the University of Rennes is looking for passionate and motivated Digital Design Engineers seeking to make an impact in the fields of computer architecture and AI hardware accelerators. The right candidate will not be afraid to attack complex problems and assume broad ownership, ranging from chip or block architecture and programming models through RTL implementation, design verification, physical design, and DFT.

Are you an experienced or young engineer interested in hardware design and looking for an exciting opportunity to advance your career? Join our team, where we design and verify hardware prototypes of processors and AI accelerators to support our research. We are seeking a creative and skilled colleague to help develop chips (ASICs) or FPGA prototypes. Are you looking for broader exposure across multiple IP designs? Do you want the opportunity to work globally within a recognized research team to deliver innovative systems? Join us to help shape the future of our research!

Assignment

As an FPGA hardware design engineer, you will design and develop complex digital systems using field-programmable gate arrays (FPGAs) for different hardware prototypes. Your goal will be to achieve maximum efficiency in power consumption, performance, and area while ensuring correct functional behavior. Your key responsibilities will include participating in the whole design flow:

• Participating in defining the microarchitecture.
• Developing system-level RTL code using System Verilog or VHDL.
• Running design checks and identifying and fixing bugs.
• Physical design (placement and routing) of the chip using the latest industrial methodologies and tools.
• Back-end design and verification.

Collaboration with researchers and engineers across the architecture, verification, performance analysis, power analysis, implementation, and various IP functions is essential to achieve success in our projects.

Main activities

You will be responsible for designing, implementing, and testing FPGA-based systems for a wide range of applications, such as security protocols and AI accelerators, among others. You will be involved in several research projects inside the TARAN team. Your main tasks are summarized below.

• Define FPGA architecture and develop synthesizable RTL (VHDL or SV) for:
  • Communication protocols (e.g., USB).
  • Memory controllers.
  • AI accelerators such as systolic arrays.
  • Specific optimized arithmetic functions.
  • Fixed‑point digital signal processing as needed for filtering, estimation, or modulation.
  • Partition functions between FPGA, MCU/DSP, and other devices considering performance.
  • Select appropriate FPGA families and IP for timing‑critical and safety‑related functions.
• Develop testbenches and simulations to verify your designs.
• Perform static timing analysis and timing closure for:
  • Tight real‑time constraints.
  • Multiple clock domains and asynchronous interfaces.
• Support lab and field testing:
  • Board bring‑up and system integration.
  • Debugging under real operating conditions using oscilloscopes, logic analyzers, current/voltage probes, and protocol analyzers.
• Create and maintain documentation:
  • FPGA specifications, timing budgets, and interface definitions.
  • Verification plans, test reports, and release notes.
• Support production and field updates (JTAG, in‑system programming, secure and fail‑safe update mechanisms).
• The position is for a one-year term, but it may be extended for up to 2 years.

Skills

• Required Skills And Experience
• You graduated from a University or Engineering School, in Computer Science, Computer Engineering or Electronic / Electrical Engineering
• Solid understanding of SoC / FPGA design methodologies and techniques with hands‑on experience of SoC design and integration for complex SoC
• Experience in RTL design using Verilog, System Verilog or VHDL
• Experience or knowledge in back‑end design methodologies and tools (place and route) is a plus.
• Knowledge of at least one full FPGA implementation flow.

Nice To Have

• Have knowledge of AMBA protocol like AXI/AHB/APB/CHI
• Understanding of memory controller, microprocessors, and debug architecture
• Knowledge of basic scripting languages, e.g., Perl/TCL/Python
• Experience with Linux, shell scripts, Makefiles, and repository management systems like GIT
• Knowledge of hardware verification techniques
• Familiar with embedded C, assembly, and compilers