Data Center Post-Silicon Power & Performance Engineer

Energy Jobline ATTB

Théméricourt

On-site

EUR 128,000 - 191,000

Full time

14 days+

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Job summary

Qualcomm Technologies, Inc. seeks a Data Center Post Silicon Power and Performance Engineer to characterize, debug, and optimize SoC power and performance. You will develop validation plans, tune optimizations, and verify silicon meets high efficiency targets.

You will define pre-Si methodologies, work with cross-functional teams, and contribute to architecture feedback for next-gen server CPUs, focusing on data center workloads and system performance.

Qualifications

  • Bachelor or Masters Degree in Computer or Electrical Engineering with 4+ years of Systems Engineering or related work experience.
  • Advanced knowledge of post-silicon power and performance analysis for SoCs.
  • Strong programming/scripting skills in C/C++ and Python.

Responsibilities

  • Characterize Data Center workloads to inform pre-Si modeling and projections.
  • Define and execute end-to-end performance and power analysis plans for server CPUs and systems.
  • Debug issues during pre-silicon, bring-up, validation, and production phases of SOC programs.
  • Lead optimization strategy to deliver top-tier CPU workload performance.
  • Collaborate with design, architecture, emulation, firmware, DV, and software teams to ensure readiness for first silicon arrival.

Skills

Post-silicon performance analysis
C/C++
Python
CPU architecture
System benchmarking
Collaboration
Debugging

Education

Bachelor's degree in Engineering/CS/EE
Master’s degree in Engineering/CS/IS
PhD in Engineering/CS/IS

Tools

ARMv8/v9 concepts
SMMU
GIC
Coresight-PMU

Job description

Qualcomm Technologies, Inc. seeks a Data Center Post Silicon Power and Performance Engineer to characterize, debug, and optimize SoC power and performance. You will develop validation plans, tune optimizations, and verify silicon meets high efficiency targets.

You will define pre-Si methodologies, work with cross-functional teams, and contribute to architecture feedback for next-gen server CPUs, focusing on data center workloads and system performance.

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