Lead Physical Design Engineer - PPA Mastery (Hybrid)

Advanced Micro Devices, Inc.; Tampere; Hybrid; EUR 90,000 - 120,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

Advanced Micro Devices, Inc. seeks a lead engineer to drive PPA improvements for critical graphics blocks, coordinating with Physical Design and RTL teams to translate architectures into silicon from concept to tape-out.

You will study block microarchitecture, optimize memory placement, and work with RTL to resolve frequency and timing bottlenecks while mentoring junior engineers and contributing to a culture of technical excellence.

Qualifications

• Experience in ASIC Physical Design from RTL to GDSII.
• Strong RTL analysis skills including Verilog, Timing Analysis, and library understanding.
• Knowledge of design margining methodology and low voltage design.

Responsibilities

• Lead engineer driving PPA improvements for graphics blocks and liaise with PD to RTL teams.
• Study block microarchitecture and data flow to optimize memory placement and P&R recipes.
• Collaborate with RTL design to address frequency, timing, and bottlenecks early in the project cycle.

Skills

RTL analysis

Verilog

Design margining

Low voltage design

STA correlation

Mentoring

Education

Bachelor's or Master's in Computer/Electrical Engineering

Tools

Synopsys

Cadence

Mentor Graphics

Job description

Advanced Micro Devices, Inc. seeks a lead engineer to drive PPA improvements for critical graphics blocks, coordinating with Physical Design and RTL teams to translate architectures into silicon from concept to tape-out.

You will study block microarchitecture, optimize memory placement, and work with RTL to resolve frequency and timing bottlenecks while mentoring junior engineers and contributing to a culture of technical excellence.