Lead Validation Engineer - Data Center GPU

Advanced Micro Devices; Tampere; Hybrid; EUR 75,000 - 112,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

Advanced Micro Devices (AMD) is seeking a Lead Domain Validation Engineer in Markham, ON, to drive IP domain and power-management validation for Data Center GPU products. You will own validation strategy, plan, and execution across emulation, bring-up, and post-silicon stages, collaborating with architecture, design, firmware, diagnostics, and platform teams.

The ideal candidate leads debugging efforts, performs root-cause analysis, and ensures closure while mentoring engineers and shaping

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field preferred.
• Strong experience in semiconductor validation, silicon bring-up, SoC validation, firmware validation, or hardware/software integration.
• Proficiency in Python and C/C++ for automation, test infrastructure, or debug-analysis tools.

Responsibilities

• Own SMU hardware validation planning and execution across emulation, ASIC bring-up, post-silicon enablement, regression, and sustaining phases.
• Develop validation plans for SMU sub-blocks and power-management features, including bootcode, clocking, fuse, SMN, SMUIO, thermal, RSMU, security-related interactions, and other system-management functions.
• Lead debug triage, root-cause analysis, and issue closure across hardware, firmware, platform, diagnostics, and system-level interactions.
• Partner with architecture, design, firmware, diagnostics, platform, automation, customer engineering, and program teams to align scope, risks, dependencies, and exit criteria.
• Build and improve automation, validation content, debug-analysis scripts, and regression checks to improve coverage, efficiency, and repeatability.
• Review RTL, specifications, firmware interfaces, register maps, and validation collateral toidentifycoverage gaps and improve validation effectiveness.
• Support lab-based and system-level debug using platform tools, firmware logs, register-level analysis, and standard measurement equipment.
• Support customer and sustaining issues by providing SMU technicalexpertise, debug guidance, and issue-resolution support.
• Mentor engineers andhelp improve team validationmethodology, debug practices, and product quality.

Skills

Python

C/C++

Linux

Debugging

System-level validation

Education

Bachelor's or Master's in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Emulation

FPGA

PCIe

Register maps

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou'redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger- technologythat moves the world forward.Join us and, together, we'll advance your career.

THE ROLE:

As an Lead Domain Validation Engineer in the Data Center and GPU Accelerated Processing Division, you will drive IP domain and power-management validation for AMD Data Center GPU products across pre-silicon, bring-up, post-silicon enablement, and system-level debug.You will own key areas of validation strategy and execution while partnering with architecture, design, firmware, diagnostics, platform, automation, customer engineering, and program teams to deliver high-quality next-generation AI and HPC products.

THE PERSON:

The ideal candidate is a motivated technical leader with strong experience in SoC domain validation, hardware features, firmware interactions, subsystem communication, and system-level debug. You can independently drive validation planning, issue triage, root-cause analysis, and closure while influencing cross-functional teams, mentoring engineers, and communicating clearly with technical and program stakeholders.

KEY RESPONSIBILITIES:

• Own SMU hardware validation planning and execution across emulation, ASIC bring-up, post-silicon enablement, regression, and sustaining phases.

• Develop validation plans for SMU sub-blocks and power-management features, including bootcode, clocking, fuse, SMN, SMUIO, thermal, RSMU, security-related interactions, and other system-management functions.

• Lead debug triage, root-cause analysis, and issue closure across hardware, firmware, platform, diagnostics, and system-level interactions.

• Partner with architecture, design, firmware, diagnostics, platform, automation, customer engineering, and program teams to align scope, risks, dependencies, and exit criteria.

• Build and improve automation, validation content, debug-analysis scripts, and regression checks to improve coverage, efficiency, and repeatability.

• Review RTL, specifications, firmware interfaces, register maps, and validation collateral toidentifycoverage gaps and improve validation effectiveness.

• Support lab-based and system-level debug using platform tools, firmware logs, register-level analysis, and standard measurement equipment.

• Support customer and sustaining issues by providing SMU technicalexpertise, debug guidance, and issue-resolution support.

• Mentor engineers andhelp improve team validationmethodology, debug practices, and product quality.

PREFERRED EXPERIENCE:

• Strong experience in semiconductor validation, silicon bring-up, SoC validation, firmware validation, or hardware/software integration.

• Hands-on experience with power-management validation, SMU/PMFW functionality, SoC control fabrics, clocking, reset, fuse, thermal, voltage-regulator, or platform-management features.

• Experience developing validation plans, test content, automation, anddebugmethodologies for complex SoC or GPU products.

• Strong debug skills across hardware, firmware, software, diagnostics, and platform interactions.

• Experience with emulation, simulation, or FPGA/prototyping environments.

• Proficiencyin Python and C/C++ for automation, test infrastructure, or debug-analysis tools.

• Familiarity with Linux, lab bring-up, register-level debug, firmware logs, and platform debug tools.

• Ability to execute independently, manage priorities, influence cross-functional teams, and drive technical issues to closure.

ACADEMIC CREDENTIALS:

• Bachelor's or master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field preferred.

LOCATION:

Markham, ON

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.