Senior RFIC Architect & Lead Mixed-Signal Designer

MaxLinear, Inc.; Paterna; Sur place; EUR 130 000 - 190 000; Plein temps

Avantages offerts par ce poste

Stock-based compensation

Private Medical Insurance

Life Insurance

Résumé du poste

MaxLinear, Inc. in Valencia, Spain, seeks an experienced Principal RFIC Design Engineer to lead complex RF and mixed-signal IC development from architecture to production.

You will own critical RFIC blocks such as LNAs, PAs, mixers, PLLs, and data-converter front ends, mentor the RFIC team, and collaborate with layout, validation, and product engineering to ensure successful silicon bring-up and high-volume manufacturing.

Qualifications

• Minimum 10 years of industry experience in RFIC or analog/mixed-signal IC design.
• Strong RF and analog fundamentals, including noise, linearity, matching, stability, and data-converter performance.
• Hands-on design across RF, data-converter, SerDes, PLLs/VCOs and related analog blocks.

Responsabilités

• Lead architecture, design, simulation, and verification of RF, analog baseband, and mixed-signal circuits.
• Own critical RFIC blocks from specification through tapeout and silicon bring-up.
• Guide layout engineers on RF-aware layout and post-layout verification.
• Translate system requirements into circuit specs and validation plans.
• Lead RFIC top-level integration and sign-off across multiple domains.

Connaissances

RFIC design

Analog/mixed-signal

LNA/PA design

Cadence Virtuoso/Spectre

S-parameters / PSS / PNOISE

RF layout optimization

Silicon bring-up

Mentorship

English communication

Formation

BSc, MSc, or PhD in Electrical or Electronic Engineering

Outils

Cadence Virtuoso/Spectre

Description du poste

MaxLinear, Inc. in Valencia, Spain, seeks an experienced Principal RFIC Design Engineer to lead complex RF and mixed-signal IC development from architecture to production.

You will own critical RFIC blocks such as LNAs, PAs, mixers, PLLs, and data-converter front ends, mentor the RFIC team, and collaborate with layout, validation, and product engineering to ensure successful silicon bring-up and high-volume manufacturing.