Senior ASIC Verification & Validation Engineer for SoCs

Oesía Group; Rivas-Vaciamadrid; Presencial; EUR 60.000 - 90.000; Jornada completa

Descripción de la vacante

Grupo Oesía is seeking an experienced ASIC/SoC verification engineer in Spain to design, develop and verify complex designs within multidisciplinary teams. You will verify and validate ASIC/SoC blocks, contribute to UVM-based verification, and collaborate across Front-End and Back-End flows to ensure robust silicon.

Experience with tape-outs, integration of third-party IPs, and silicon validation is essential.

Formación

• Degree in Telecommunications Engineering, Electronics, Industrial Engineering or Computer Engineering.
• Experience in ASIC/SoC verification environments.
• Participation in complete ASIC development lifecycles.
• Experience with ASIC tape-outs and IC fabrication.
• Experience with SoCs based on RISC-V/ARM or equivalent architectures.
• Experience integrating third-party IPs and complex subsystems.
• Knowledge of Front-End and Back-End ASIC flows.
• Experience using UVM verification methodologies.
• Knowledge of DFT, ATPG, MBIST/LBIST and silicon validation.
• Experience with Cadence, Synopsys or Siemens EDA tools.

Responsabilidades

• Participate in verification and validation of ASIC/SoC designs.
• Contribute to functional verification using UVM.
• Verify SoCs based on RISC-V/ARM or equivalent architectures.
• Verify third-party IPs and complex subsystems.
• Collaborate with Front-End and Back-End ASIC teams.
• Engage in DFT, ATPG, MBIST/LBIST activities.
• Contribute to silicon validation after tape-out.
• Work with architecture, RTL, physical implementation and test teams.
• Participate in lifecycle activities from design to tape-out and fabrication.

Conocimientos

ASIC verification

SoC verification

UVM methodologies

DFT/ATPG/MBIST/LBIST

Front-End/Back-End ASIC flows

IP integration verification

tape-outs

silicon validation

multi-disciplinary collaboration

Educación

Degree in Telecommunications Engineering, Electronics, Industrial Engineering, Computer Engineering

Herramientas

Cadence

Synopsys

Siemens EDA

Descripción del empleo

Grupo Oesía is seeking an experienced ASIC/SoC verification engineer in Spain to design, develop and verify complex designs within multidisciplinary teams. You will verify and validate ASIC/SoC blocks, contribute to UVM-based verification, and collaborate across Front-End and Back-End flows to ensure robust silicon.

Experience with tape-outs, integration of third-party IPs, and silicon validation is essential.