Digital ASIC Design Engineer

IC Resources; Barcelona; Presencial; EUR 90.000 - 130.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Visa sponsorship

Relocation support

Descripción de la vacante

IC Resources is seeking a senior digital design engineer to work on cutting-edge semiconductor technology. You will contribute to advanced nodes with RISC-V designs, CPU architecture, PCIe protocols and even machine learning.

The role requires strong experience in ASIC/FPGA design, UVM environments, and SystemVerilog for IP/SOC designs. Visa sponsorship and relocation support are offered if needed.

Formación

• Degree in Electronics / Microelectronics or similar field.
• Strong experience in ASIC / FPGA design projects.
• UVM environments & processes.
• SystemVerilog for IP / SOC design of digital ICs / ASIC IP or chips.
• Experience with complex ASIC/FPGA designs & architecture for advanced technology nodes.
• RISC-V / CPU / GPU knowledge is a bonus but not required.
• PCIe knowledge is a bonus.

Responsabilidades

• Work on latest cutting-edge technology in semiconductor industry.
• Contribute to advanced technology nodes, including RISC-V designs, CPU architecture, PCIe protocols and machine learning.
• Senior digital design engineer role with experience in ASIC/FPGA design.

Conocimientos

RISC-V knowledge

CPU architecture

SystemVerilog

UVM

ASIC/FPGA design

PCIe knowledge

Educación

Degree in Electronics/Microelectronics

Descripción del empleo

Exciting opportunity to work on the latest cutting-edge technology in the semiconductor industry.

In this new role as senior digital design engineer you will have the opportunity to contribute to advanced technology nodes, consisting of RISC-V designs, CPU architecture, PCIe protocols and machine learning.

I am looking to speak with senior digital design engineers - who have experience of, or an interest in:

• Degree in Electronics / Microelectronics or similar field
• Strong experience in ASIC / FPGA design projects
• UVM environments & processes
• System Verilog for IP / SOC design of digital ICs / ASIC IP or chips
• Complex ASIC/FPGA designs & architecture for advanced technology nodes
• RISC-V / CPU / GPU knowledge (is a bonus, but not required)
• PCIe knowledge (also a bonus skill)

• Visa sponsorship and relocation support can be offered if required.

Tel - 01189073075

LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/