Digital Ic Designer

TMRW; Barcelona; Presencial; EUR 55.000 - 75.000; Jornada completa

Descripción de la vacante

The TMRW Foundation SILICON in Barcelona is seeking a highly skilled Digital IC Designer to join our engineering team. You will design, simulate, and verify complex digital ICs, ensuring performance, power, and area targets using the Cadence tool suite.

You will collaborate with system architects and layout engineers, develop RTL in Verilog/VHDL, and perform timing analysis and documentation for tape-out readiness in a hands-on end-to-end design flow.

Formación

• Bachelor's or Master's in Electrical/Computer Engineering with a VLSI focus.

Responsabilidades

• RTL design and development using VHDL/Verilog based on design specifications.
• Simulation and verification with Cadence tools to validate performance and functionality.
• Synthesis and physical design tasks including floorplanning, placement, clock tree synthesis, and routing.
• Timing analysis and signoff using tools like Tempus to meet timing requirements.
• Physical verification (DRC/LVS) to prepare designs for fabrication (tape-out).
• Collaborate with cross-functional teams including system architects, analog designers, and layout engineers.
• Create and maintain design documentation and test plans.

Conocimientos

Digital IC design

Verilog/VHDL

RTL development

Scripting (Tcl, Python)

Educación

Bachelor's or Master's in Electrical/Computer Engineering (VLSI focus)

Herramientas

Cadence Genus

Cadence Innovus

Cadence Tempus

Cadence NC Launch/Incisive

Cadence SimVision

Virtuoso

Synopsys

Mentor Graphics

Descripción del empleo

Join a thriving environment tasked with delivering new and disruptive technologies!

We are seeking a highly motivated and skilled Digital IC Designer to join our engineering team.

The ideal candidate will be responsible for the design, development, simulation, and verification of complex digital integrated circuits (ICs) for various applications.

This role requires hands?on experience with the Cadence suite of Electronic Design Automation (EDA) tools to ensure designs meet performance, power, and area specifications.

Key Responsibilities

• RTL Design & Development: Develop and implement RTL (Register Transfer Level) code using VHDL/Verilog based on design specifications.
• Simulation and Verification: Perform thorough functional verification and simulation of IC designs using Cadence verification tools (e.g., Cadence NC?Launch/Incisive, SimVision) to validate performance and functionality.
• Synthesis and Implementation: Work on synthesis and physical design tasks, including floorplanning, placement, clock tree synthesis, and routing using Cadence physical design platforms (e.g., Cadence Genus, Cadence Innovus).
• Timing Analysis and Signoff: Conduct static timing analysis (STA) and timing closure using tools like Cadence Tempus to ensure designs meet all timing requirements.
• Physical Verification: Perform design rule checks (DRC) and layout versus schematic (LVS) verification using tools such as Cadence Pegasus or Cadence Innovus to prepare designs for fabrication (tape?out).
• Collaboration: Collaborate with cross?functional teams, including system architects, analog designers, and layout engineers, to ensure seamless integration and successful product development.
• Documentation: Create and maintain comprehensive design documentation, technical reports, and test plans.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with a focus on VLSI or microelectronics.
• Proven experience in digital IC design, with a strong portfolio of completed projects.
• Expertise in the Cadence digital design flow is a must, including tools like Virtuoso (for schematics/layout viewing), Genus (synthesis), Innovus (physical design), Tempus (timing analysis), and verification tools.
• Familiarity with other industry?standard EDA tools (Synopsys, Mentor Graphics) is a plus.
• Proficiency in hardware description languages (Verilog, VHDL).
• Strong understanding of semiconductor physics and fabrication processes.
• Knowledge of low?power design techniques and methodologies.
• Scripting skills (Tcl, Perl, Python) to automate design flows are desirable.
• Strong analytical and problem?solving skills, excellent communication, and the ability to work effectively in a team environment.

Nice to Have

• Familiarity with other industry?standard EDA tools (e.g., Synopsys, Mentor Graphics).
• Experience with low?power design methodologies and advanced optimization techniques.
• Strong scripting abilities (Tcl, Perl, Python) to automate design flows and improve efficiency.
• Exposure to mixed?signal or analog/digital integration projects.
• Knowledge of semiconductor fabrication processes and design for manufacturability (DFM).
• Experience working in multicultural, cross?functional engineering teams.
• Ability to produce clear technical documentation and communicate complex concepts effectively.

Why Join Us

At The TMRW Foundation SILICON - you will be part of a dynamic and innovative team that is dedicated to building cutting?edge technologies.

We offer a collaborative and inclusive work environment where your contributions will make a significant impact.

Location: Barcelona, Catalonia, Spain.

Seniority Level: Mid?Senior level

Employment Type: Full?time

Job Function: Engineering and Design