System on Chip (SoC) Verification Engineer (all genders)

TN Germany; Erlangen; Vor Ort; EUR 60.000 - 90.000; Vollzeit

Zusammenfassung

Join a leading research organization as a SoC Verification Engineer and contribute to cutting-edge technologies in digital chip design. Work in a collaborative environment focused on RISC-V architecture, where you will develop verification plans and testbenches, ensuring high-quality standards. This role offers the chance to engage in innovative projects that shape the future of technology, with a supportive culture that promotes personal development and creativity. If you're passionate about engineering and eager to make an impact, this opportunity is perfect for you.

Leistungen

Flexible working hours

Personal development opportunities

Friendly working atmosphere

Creative freedom

Diversity promotion programs

Qualifikationen

• Solid understanding of digital logic design and RISC-V architecture.
• Proven experience with SystemVerilog and UVM-based verification.

Aufgaben

• Develop and maintain reusable testbenches for IP/block-level verification.
• Translate design specifications into comprehensive verification plans.

Kenntnisse

SystemVerilog

UVM-based verification

RISC-V architecture

Digital logic design

C / C++ programming

Python

Low power verification techniques

Formal verification tools

Ausbildung

University degree in electrical engineering or related field

Tools

JasperGold

Jobbeschreibung

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System on Chip (SoC) Verification Engineer (all genders), Erlangen

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Job Reference:

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Posted:

05.05.2025

Expiry Date:

19.06.2025

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Job Description:

System on Chip (SoC) Verification Engineer (all genders) at Fraunhofer-Institut für Integrierte Schaltungen IIS | softgardenView job here

System on Chip (SoC) Verification Engineer (all genders)

Full or Part Time

Hybrid

With Professional Experience

4/28/25

The Fraunhofer-Gesellschaft currently operates 76 institutes and research institutions throughout Germany and is the world’s leading applied research organization. Around 32 000 employees work with an annual research budget of 3.4 billion euros. The Fraunhofer Institute for Integrated Circuits IIS, headquartered in Erlangen, is the largest institute of the Fraunhofer-Gesellschaft with more than 1 200 employees.

We bring chip design back to Europe!

For a technologically more independent Europe, we aim to develop Fraunhofer IIS into a European IC Design Center for trusted and energy-efficient high-speed ICs by 2026. As a leading competence center for digital chip design, we deliver essential cutting-edge technologies in the areas of exascale high-performance computing and trusted electronics. In addition, we offer sophisticated digital design services based on RISC-V. Our target customers are design houses, semiconductor manufacturers, SMEs, and system integrators. Potential applications are areas such as high-speed data processing, blockchain or cybersecurity. Today, our »Integrated Digital Systems« business unit develops digital circuits in CMOS technologies as System on Chip, ASIC or IP.

Here's how you will make a difference

As a SoC Verification Engineer, you will play a key role in pre-silicon RTL verification of block and top-level SoC designs utilizing RISC-V architecture. Working closely with cross-functional teams, you will help shape a modern, reusable verification environment using state-of-the-art methodologies and metric-driven approaches.

Your key responsibilities:

• Understand the nuances of RISC-V architectures and industry-standard low-power architectures to build block/chip level testbenches using best-in-class verification methodologies
• Translate design specifications into comprehensive verification plans in collaboration with system architects
• Develop and maintain reusable testbenches for IP/block-level verification and support IP integration verification
• Create smart, constraint-random and directed test cases tailored to RISC-V SoCs
• Build and analyze coverage models, and refine tests to close coverage gaps
• Debug test failures, manage bug tracking, and ensure coverage closure
• Lead verification reviews to uphold coding quality and best practices in SoC verification
• Prepare, run, and evaluate regression runs

What you bring to the table

• University degree in (electrical) engineering, IT/computer science or another related field
• Solid understanding of digital logic design and RISC-V-based SoC architecture
• Proven experience with SystemVerilog and UVM-based verification environments
• Very good English and good German language skills
• Proactive and independent mindset

Nice to have:

• Familiarity with C / C++ programming, assembly and object-oriented languages such as Python
• Knowledge of industry-standard interfaces and bus protocols (e.g., AXI)
• Experience with IP verification methods, integration verification specific to RISC-V and embedded CPU verification
• Interest in low power verification techniques and formal verification tools (e.g. JasperGold)

What you can expect

Fraunhofer is not only the largest organization for applied research in Europe, but also a top-rated employer. How so?

• Our institute culture: We want our colleagues to feel comfortable. Therefore, we constantly strive to ensure a friendly and supportive working atmosphere within our international team.
• Exciting activities: With customers and partners across the globe, we provide an attractive working environment in a highly innovative key industry with exciting ventures and new experiences.
• Room for creativity: We want to give our colleagues a generous amount of creative freedom so that they can contribute and develop their own ideas.
• Personal development: With top-of-the-range company equipment and regular training, we aim to provide the best possible working conditions and development opportunities for our colleagues.
• Flexible working hours: Due to our wide range of offers, we make it easy for our colleagues to find a comfortable balance between their private and professional lives.
• Equal opportunity: Our female scientists, for example, can benefit from the career program »Fraunhofer TALENTA«.

More information about our employer offers on our website: https://www.iis.fraunhofer.de/en/jobs/arbeiten.html

The position is initially limited to 2 years with the aim to extend it subsequently. The weekly working time is 39 hours. The position can also be filled on a part-time basis with a preference, however, to have it filled as close to a full-time position as possible.

We value and promote the diversity of our employees' skills and therefore welcome all applications - regardless of age, gender, nationality, ethnic and social origin, religion, ideology, disability, sexual orientation and identity. Appointment, remuneration and social security benefits based on the public-sector collective wage agreement (TVöD).

With its focus on developing key technologies that are vital for the future and enabling the commercial utilization of this work by business and industry, Fraunhofer plays a central role in the innovation process. As a pioneer and catalyst for groundbreaking developments and scientific excellence, Fraunhofer helps shape society now and in the future.

Would you like to work with us?

Intimidating? Don't worry.
We are an interdisciplinary team, looking to support young career-oriented talents. Hence, do not hesitate to join Fraunhofer and send us your application!

Please submit it (cover letter, CV and grade sheets) online!

Important: Please do not forget to click on the »Apply« button after »Save«. Otherwise, your application will not reach us.

Questions about this position will be answered by Luca Prietz.

Fraunhofer Institute for Integrated Circuits IIS
www.iis.fraunhofer.de