Senior Process Engineer, CMP

Jobtailor; Aachen; Vor Ort; EUR 90.000 - 120.000; Vollzeit

Zusammenfassung

Jobtailor is seeking a Senior CMP Process Engineer in Aachen to lead the development and implementation of CMP processes for 2D materials and advanced device architectures. You will own fab startup activities, install and qualify tools, and establish Process of Record protocols for critical clean steps.

The role requires hands-on CMP experience, contamination control expertise, and a track record in ramping processes in fab environments, with a focus on 300 mm scales.

Qualifikationen

• Minimum 5 years of hands-on experience in semiconductor process engineering with a focus on CMP.
• Experience with contamination control and CMP-related surface prep.
• Familiarity with CMP consumables, chemicals, process and hardware.

Aufgaben

• Lead the development and implementation of CMP processes tailored to 2D materials (e.g., graphene) and novel device architectures.
• Evaluate and define process specifications; collaborate with internal stakeholders and vendors to select and qualify the CMP tools.
• Own key fab startup activities, including tool installation, acceptance testing, recipe validation, and ramp-up.
• Establish and maintain Process of Record (POR) for critical clean steps; define ramp-to-production protocols.
• Implement and manage SPC systems, drive continuous improvement via data-driven methodologies.

Kenntnisse

CMP process engineering

Contamination control

2D materials integration

Fab startup

Tool qualification

SPC systems

Tools

AMAT plating tools

Ebara plating tools

Jobbeschreibung

Responsibilities

• Lead the development and implementation of CMP processes tailored to 2D materials (e.g., graphene) and novel device architectures
• Evaluate and define process specifications; collaborate with internal stakeholders and vendors to select and qualify the CMP tools
• Own key fab startup activities, including tool installation, acceptance testing, recipe validation, and ramp-up
• Establish and maintain Process of Record (POR) for critical clean steps; define ramp-to-production protocols
• Implement and manage SPC systems, drive continuous improvement via data-driven methodologies

Requirements

• Minimum 5 years of hands‑on experience in semiconductor process engineering with a focus on CMP
• Deep understanding of contamination control, surface preparation, and CMP challenges
• Proven experience working with CMP consumables, chemicals, process and hardware
• Practical exposure to 2D material preparation and integration is a strong plus
• 300mm plating tools hands‑on experience (AMAT, Ebara etc.)
• Experience in fab startup, pilot line development, or technology ramp‑up environments is highly desirable