Senior FPGA RF Signal Processing Engineer (m/w/d)

ZeroPhase GmbH; Dortmund; Hybrid; EUR 90,000 - 120,000; Full time

Job summary

ZeroPhase GmbH in Dortmund is seeking a Senior FPGA RF Signal Processing Engineer to bridge RF theory, DSP algorithm design, and high-performance FPGA implementation for our software-defined radio used on uncrewed platforms.

You will translate floating-point models to fixed-point, develop HDL for real-time operation, and validate on hardware under real RF conditions, collaborating closely with RF and embedded teams. If you want your DSP work to fly, not just simulate, we want to hear from you.

Qualifications

• 5+ years of professional FPGA development for RF/DSP
• Translate prototype algorithms into working FPGA implementations
• Strong HDL (VHDL/Verilog/SystemVerilog) and FPGA system architecture

Responsibilities

• Design, simulate, and implement DSP algorithms for communications applications.
• Implement and optimise HDL for real-time FPGA execution; prototyping in Python/MATLAB.
• Develop floating-point and fixed-point models and run simulations to validate performance.
• Collaborate with RF and embedded software engineers on bring-up, calibration, and integration.
• Create system test plans and validate against real signal conditions.
• Author design specifications and test reports for repeatable development.

Skills

DSP algorithms

FPGA development

HDL languages

German/English

Education

Bachelor's degree in electrical engineering, computer engineering, physics, or related field

Tools

Xilinx/AMD RFSoC/MPSoC

Job description

As a Senior FPGA RF Signal Processing Engineer, you will work at the intersection of RF theory, DSP algorithm design, and high-performance FPGA implementation to deliver the signal-processing core of a software-defined radio built for uncrewed platforms. You will take algorithms from floating-point models through fixed-point simulation to real-time HDL, and see them through to bring-up and validation on real hardware, in real RF conditions. If you want your DSP work to end up flying, not just simulating, we want to hear from you.

What you'll do

• Design, simulate, and implement DSP algorithms for communications applications: modulation and demodulation, channel coding, synchronisation, equalisation, and channel estimation.
• Implement and optimise these algorithms as HDL (VHDL/Verilog/SystemVerilog) for real-time execution on FPGA, and support prototyping in Python/MATLAB ahead of the hardware port.
• Develop floating-point and fixed-point models, and run simulations to validate system and modem performance before committing to hardware.
• Work closely with our RF and embedded software engineers on instrument bring-up, calibration routines, and full system integration.
• Support FPGA bring-up and validation by developing and executing system test plans in the lab, against real signal conditions, not just testbenches.
• Author the technical documentation, design specifications, and test reports that let the rest of the team build on your work.

What we're looking for

• Bachelor's degree in electrical engineering, computer engineering, physics, or a related field.
• 5+ years of professional experience in FPGA development for RF/DSP, and in translating prototype algorithms into working FPGA implementations.
• Practical experience in some of the following: spectrum monitoring, signal intelligence, modulation/demodulation, filtering, channel estimation, equalisation, synchronisation, or AGC.
• Strong command of HDL (VHDL/Verilog/SystemVerilog) and FPGA system architecture and design flows.
• A systems-level mindset that connects RF physics, DSP mathematics, and FPGA implementation, rather than treating them as separate disciplines.
• Comfortable working closely with a small, interdisciplinary team, and documenting your own designs clearly enough for others to pick up.
• Professional fluency in German & English.

Bonus: not required

• Master's degree in electrical or computer engineering, with an emphasis on communication systems or digital signal processing.
• Experience with multiple access schemes (TDMA, CDMA, OFDMA) and wireless standards such as 5G NR, LTE, Wi-Fi, or Bluetooth.
• Familiarity with Xilinx/AMD RFSoC or MPSoC platforms.
• Proficiency in C/C++ or Rust for embedded and real-time systems.
• Familiarity with any of: DPD (digital predistortion), beamforming, MIMO; modulation schemes (QAM, OFDM, FSK), channel coding, and adaptive filtering; RF fundamentals such as mixers, PLLs, ADCs/DACs, IQ imbalance, frequency planning, and link budgets; or calibration algorithms (DC offset, IQ correction, LO leakage).
• Comfortable with Git, JTAG/GDB-style debugging, and lab instrumentation (oscilloscopes, VNAs, spectrum analysers).
• Hands-on experience designing and verifying high-data-rate wireless modems end to end, from link budget through to link-level algorithms.

How the hiring process works

• Intro call. 30 minutes with our recruiting team. We'll learn about your background, and you'll learn about the mission.
• Deep dive. A working session with one of our DSP/FPGA engineers on a real modem or signal-processing problem.
• Case study, in Dortmund. A visit to the office to work through an FPGA/DSP design scenario with the team, in person if you can make it or over Teams if you can't.
• The offer. By now you've likely already met our CEO. This round is where we make it official: fast, transparent, and built around the mission.