Get a reply from this employer
Your resume and cover letter, tailored to exactly what they’re hiring for.
The Barkhausen Institut seeks a Senior Engineer “Digital Hardware Design” (m/w/d) to design, develop and integrate digital hardware for ASIC and FPGA platforms within the Scalable Computing Hardware group. The role includes leading architecture concepts and hands-on RTL verification using Cadence, Synopsys and open-source tools.
Applicants should hold an MSc/Diploma in electrical engineering or computer science, have 5+ years in ASIC design, and strong Verilog/VHDL and Python skills, plus
The Barkhausen Institut performs research on the latest hardware, software and communication technologies and demonstrates their application in tomorrow’s society. Our goal is to build a flexible and trustworthy IoT platform based on reliable electronics and secure communication methods.
The group Scalable Computing Hardware is developing a secure and dependable multiprocessor system-on-chip (MPSoC) to establish a hardware platform for applications in the area of connected electronic systems.
At the earliest possible date we are looking for a
Senior Engineer “Digital Hardware Design” (m/w/d)
The position will initially be filled for a period of 2 years and will be remunerated in line with TV-L E-13.
Life and science are compatible at our institute. We offer a range of recognised family-friendly measures, such as part‑time work, mobile working and flexible working hours that take family needs into account. We also offer support for arriving in Dresden (all formalities, apartment etc.).
Barkhausen Institut strives for gender and diversity equality. We welcome applications from all backgrounds. Severely disabled persons are given preference in the event of equal suitability.