Senior Digital ASIC Design Engineer (m/f/d)

Elektropraktiker; Böblingen; Hybrid; EUR 70,000 - 110,000; Full time

Job summary

Advantest in Germany seeks a Senior Digital ASIC Design Engineer to join a global engineering team and drive digital modules from concept to silicon in next-gen semiconductor testers.

You will work with system architects, software, and marketing to deliver robust, scalable ASIC solutions, including RTL coding, verification, and collaboration across disciplines.

Qualifications

• Background in digital design (SOC), ASIC design methodologies and silicon development cycle.
• Experience with RTL coding (Verilog) and digital design verification.
• Familiarity with UNIX/Linux environments and programming basics.
• Strong communication and teamwork abilities.

Responsibilities

• Requirements gathering and elicitation for IP and modules.
• Architecture development for CMOS IP designs.
• Design and RTL coding of digital modules and sub-systems.
• Module and chip level verification and test planning.
• Documentation of implemented functionality and collaboration with other functions.

Skills

Digital design (SOC)

RTL coding (Verilog)

Unix/Linux knowledge

English skills

Education

University degree in EE

Job description

Senior Digital ASIC Design Engineer (m/f/d)## Ihre TätigkeitenJoin a global, highly skilled engineering team at the heart of Advantest's cutting edge IC test solutions. As a Digital ASIC Design Engineer, you will help create the key technologies that enable the next generation of semiconductor testing. You will work on complex mixed signal ASICs used in Advantest's industry leading testers, taking digital modules and subsystems from first concept all the way to silicon in the final system, giving you true end to end ownership. In this role, you will collaborate closely with system architects, software engineers, product marketing, and other engineering disciplines. You will translate requirements into robust designs, solve challenging technical problems, and deliver high quality results on schedule and at scale. Job Duties & Responsibilities Requirements gathering and elicitation for IP Architecture development for CMOS IP designs Design and RTL coding of digital and full-custom modules Verification on module and chip level including test plan/cases generation. Documentation of implemented functionality Support for floor-planning and physical design Collaboration with other functions## Ihr ProfilUniversity degree, Diploma or BS EE Background in digital design (SOC), Application Specific Integrated Circuit (ASIC) design methodologies and silicon development cycle Experience in Register Transfer Level (RTL) coding (Verilog) Experience with standard simulation tools for digital designs Basic knowledge about UNIX\\* or Linux\\* environment and using programming languages Technical communication, team work and problem solving skills English language skills