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Physicist as Senior Staff Engineer - Timing Analysis & Verification (f/m/div)

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EUR 70.000 - 100.000

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Vor 2 Tagen
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Zusammenfassung

A leading company in semiconductor solutions is seeking a Senior Staff Engineer – Timing Analysis & Verification. The role involves developing cutting-edge timing sign-off methods and optimizing product performance, requiring a strong technical background and significant industry experience. Join us to drive innovation in an essential field for the future of technology.

Qualifikationen

  • 5+ years experience in timing analysis, verification, or digital chip design.
  • Experience in Static Timing Analysis and SPICE simulation.
  • Programming skills in Perl/Python, SQL preferred.

Aufgaben

  • Develop and implement timing sign-off methods for various technologies.
  • Analyze DSM effects for performance optimization.
  • Evaluate external foundry sign-off regulations.

Kenntnisse

Timing Analysis
Verification
Digital Chip Design
Programming in Perl/Python
Static Timing Analysis
SPICE Simulation
Hardware Description Languages
Circuit Design
Chips Design Uncertainties
Communication in English

Ausbildung

Technical degree in Electrical Engineering, Computer Science, or Physics

Jobbeschreibung

Job Description

Physicist as Senior Staff Engineer – Timing Analysis & Verification (f/m/div)

Unlock the Secrets of Timing Sign-Off: Join Our Team of Experts! Are you ready to push the boundaries of digital timing sign-off? Do you have a passion for analyzing DSM effects and optimizing product performance?

We're looking for a talented professional to develop and implement cutting-edge methods for timing sign-off. If you're up for the challenge, apply now and take your skills to the next level!

In your new role, you will:

  1. Develop and implement methods for timing sign-off process supporting technologies from 5nm to 130nm
  2. Evaluate and update digital timing sign-off guidelines
  3. Analyze DSM effects and their relevance for performance and power
  4. Develop methods to predict, assess, and measure the performance of products
  5. Assess and evaluate external foundry sign-off regulations
  6. Investigate observed and described effects
  7. Transfer dynamic effects into static analysis methods
  8. Determine and fine-tune implementation and signoff guard bands for optimal design robustness

As a Senior Staff Engineer in Timing Signoff, you are committed to customer concerns and prioritize their needs. You set ambitious goals and establish successful cooperation quickly.

You are best equipped for this task if you have:

  • A technical degree in Electrical Engineering, Computer Science, Physics, or a similar qualification
  • At least 5 years of experience in timing analysis, verification, or digital chip design
  • Experience in Static Timing Analysis and SPICE simulation
  • Advanced programming skills in Perl/Python, preferably also in SQL
  • A good understanding of hardware description languages and circuit design
  • Background knowledge of uncertainties in chip design and timing verification
  • Fluent communication skills in English; German is a plus

Contact: Carolina Moreira

Join Infineon, a global leader in semiconductor solutions for power systems and IoT, driving decarbonization and digitalization. We enable solutions for green energy, clean mobility, and secure IoT. Be part of making life easier, safer, and greener.

Our central R&D organization, "Design Enabling and Services" (DES), provides design environments for product development, ensuring high-quality manufacturing readiness. We embrace diversity and are committed to equal opportunities. We look forward to your application, even if you do not meet all requirements. Please inform your recruiter of any specific considerations that may support your participation in the interview process.

Click here for more information about & at Infineon.

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