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SPD Technology is seeking a Chip Package Designer to help develop advanced 2.5D/3.5D package substrates for high-performance ML and AI chips, enabling scalable data-center deployments.
You will collaborate with SI/PI, Thermal/Mechanical, Assembly and PCB teams to optimize electrical performance, reliability, and manufacturability, while guiding the design through all phases from routing studies to manufacturing documentation.
At SPD Technology, we bring together a team of like-minded people who are driven by the desire to bring value through their work, united in their commitment to high performance and delivering custom, cutting-edge tech solutions that drive clients' growth. We empower our people with a culture of excellence and enable them with the opportunity to uphold their accountability to contribute on each level. We value humanity and collaboration, encourage professional and personal growth, and foster a supportive and flexible work environment where everyone's contribution is welcomed.
Be part of a team pushing the boundaries of semiconductor innovation by developing custom silicon solutions that power next-generation consumer and infrastructure products. You will contribute to technologies used at massive global scale, helping shape future hardware platforms with a strong focus on performance, efficiency, reliability, and system-level integration. As a Chip Package Designer within the Silicon Integration team, you will develop package substrate designs for advanced 2.5D/3.5D packaging technologies used in high-performance ML and AI chips. You will collaborate closely with Signal Integrity/Power Integrity (SI/PI), Thermal/Mechanical, Assembly, and PCB engineering teams to develop complex, high-performance substrate designs. The primary objective will be to optimize package substrate architecture for electrical performance, reliability, manufacturability, and assembly. You will manage all major phases of the package design process, including routing feasibility studies, test vehicle development, product-level designs, design reviews, artwork export, DFM activities, and preparation of final manufacturing documentation. You will also contribute to the evaluation and adoption of advanced chip packaging technologies within the broader silicon product development pipeline. Your work will directly support successful deployment of advanced computing systems in large-scale data center environments, helping optimize PPA (Power, Performance, Area) while improving overall system performance, power efficiency, and TCO (Total Cost of Ownership). The broader AI and Infrastructure organization is focused on building next-generation computing platforms and infrastructure at exceptional scale, efficiency, reliability, and speed. These technologies support internal engineering teams, enterprise customers, and large-scale consumer-facing services worldwide. The organization works across both hardware and software, including custom AI accelerators, advanced silicon platforms, AI infrastructure, large-scale networking, data center technologies, distributed computing systems, and systems research.
Fully remote role. Flexible schedule with participation in team ceremonies and cross-functional collaboration.
As a qualified expert, You will:
Reveal great tech solutions Join the team of experts who create custom, cutting-edge tech solutions for world-renowned businesses, fueling clients growth. Unleash your potential, tackle new challenges, and be part of a team that values your skills and contributions. Focus on long-term impact and building tailored, long-lasting partnerships with