IC Package Design Engineer

Racyics; Dresden; Vor Ort; EUR 60.000 - 80.000; Vollzeit

Zusammenfassung

A leading design service partner in Dresden is looking for an IC Package Designer to optimize and simulate state-of-the-art Flip-Chip and Chip-Scale Packages. The role requires collaboration with chip design teams and involves designing layouts, ensuring signal integrity, and performing simulations. A Bachelor’s or Master’s degree in Electrical Engineering is required. Flexible work hours, childcare support, and team events are provided.

Leistungen

Flexible working hours

Mobile work

Financial support for childcare

Great team events

Qualifikationen

• Knowledge in layered substrate and manufacturing.
• Scripting skills in Python, Perl, TCL, VBA are a plus.
• Knowledge in time and frequency domain modeling.

Aufgaben

• Design and layout of IC package using state-of-the-art tools.
• Perform signal and power integrity simulations within the system.
• Document and report results, communicate with manufacturers.

Kenntnisse

Signal integrity

Power integrity

Analytical thinking

Communication skills in English and German

Team player

Ausbildung

Bachelor’s or Master’s degree in Electrical Engineering

Tools

Cadence Allegro

Ansys HFSS

ALTIUM Designer

Jobbeschreibung

Your Task is to design and simulate state-of-the-art Flip-Chip, Wirebond, and Chip-Scale Packages for integrated circuits. To design the optimal IC package, you will work closely with our chip design teams.

Job Description

Your tasks will include:

• Design and layout of the optimal IC package using state-of-the-art tools and technologies, including selecting the package type based on specifications and requirements, physical co-design (bump and pad-ring planning), considering design for manufacturability (DFM), and optimizing costs.
• Ensuring all signals can be routed and power supplies decoupled on the PCB, generating data for substrate manufacturers and assembly.
• Performing signal and power integrity simulations within the system, including PCB and IC-package, ensuring system-level integrity, extracting models using EM simulations, and generating models of IC interfaces for fast simulations.
• Estimating and simulating voltage drops within the package and system, deriving guidelines for PCB designers, and generating target impedance.
• Documenting and reporting results, communicating with substrate manufacturers and assembly partners, and staying informed about the IC packaging market and supply chain.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Communications Engineering, Information Technology, or equivalent.
• Knowledge in layered substrate and manufacturing (package substrate or PCB design).
• Knowledge in time and frequency domain modeling.
• Scripting skills (Python, Perl, TCL, VBA) are a plus.
• Self-driven, hands-on approach, strong analytical and solution-oriented thinking.
• Good communication skills in English and German.
• Team-player attitude.

Knowledge of tools such as Cadence Allegro, Cadence APD, Mentor Xpedition, Altium Designer, CST Studio Suite, Ansys HFSS, Ansys Q3D, Ansys SIwave, Cadence Sigirty, or Cadence Virtuoso is a plus.

Location

Dresden, Germany

Employment Type

Full-time (up to 40 hours per week)

About Us

Racyics is Europe’s leading design service partner for mixed-signal system-on-chip design and turnkey services in advanced nodes. We deliver professional analog, digital, and mixed-signal design services tailored to customer needs, focusing on complex System-on-Chips in leading-edge technology nodes. Our team of over 120 employees covers the complete chip design process up to system architecture development. We work with major German and international semi-custom companies, both as a service provider and through collaborative partnerships.

Working at Racyics offers benefits such as flexible working hours, mobile work, financial support for childcare, and great team events.