Experienced ASIC Analog Layout Engineer (m/f/d)

AUMOVIO; Regensburg; Vor Ort; EUR 70.000 - 110.000; Vollzeit

Zusammenfassung

AUMOVIO in Regensburg entwickelt und produziert Halbleiter- und Elektroniklösungen. Als ASIC Layout Engineer (m/f/d) arbeiten Sie an der Top-Level-Integration analoger und Mixed-Signal-ICs, treiben Layout-Entwicklungen voran und sichern robuste, DRC-konforme Designs mit effizienter Flächennutzung.

Sie kooperieren eng mit Analog-Schaltungsdesignern und Layout-Teams, definieren Floorplans, Padframes und Bonding-Diagramme und optimieren Chip-Top-Ebene.

Qualifikationen

• Akademischer Abschluss in Elektrotechnik, Mikroelectronics oder Physik bzw. vergleichbare Qualifikation.
• Langjährige Erfahrung im analogen Layout-Design.
• Nachweisliche Erfahrung in Top-Level Layout-Integration.
• Gute Kenntnisse in BCD-Technologien (65/180 nm).
• Tiefes Verständnis submikroner Effekte (Parasitik, Kopplung, Matching).
• Fundierte Kenntnisse in Layout-Tools (DRC, LVS, Extraction).
• Gute Kenntnisse im analogen Schaltungsentwurf und Englischkenntnisse.

Aufgaben

• Verantwortung für die Top-Level-Layout-Integration analoger/mixed-signal Chips (Analog oben).
• Definition von Top-Level Floorplan, Padframe-Design und Bonding-Diagrammen in Abstimmung mit anderen Domänen.
• Koordination mit weiteren Layoutern und Steuerung der Floorplans entsprechend der Chip-Top-Ebene.
• Generieren und Integrieren analoger Layouts auf Block- und Chip-Ebene.
• Durchführung von Pin-Placement, parasitischer Extraktion und Layout-Optimierung.
• Verantwortung für Einhaltung von DRC/LVS und Unterstützung beim Tape-out.
• Zusammenarbeit mit Design-Ingenieuren zur Erreichung von Speed, Area, Power, DFM, ESD und EMC.

Kenntnisse

Analog layout design experience

Top-level layout integration

BCDs 65-180nm

Parasitics & submicron effects

Layout tools (DRC/LVS/extraction)

Analog circuit design knowledge

English proficiency

German language skills (plus)

Ausbildung

Electrical engineering / Microelectronics / Physics degree

Tools

Layout tools for DRC/LVS/extraction

Jobbeschreibung

Company Description

At AUMOVIO, we own what we do: Developing and producing hardware, software, and services that shape the future of mobility. But what truly sets us apart are our people. People who thrive in our winning culture, driven by bold ideas. People who take a leap and create meaningful difference—together. Because we believe that the future belongs to those who own it. That’s why we foster a culture where you own every step of the way. Own your career, your growth, your skills, and your impact. Join us and own what’s next. Advanced Electronics & Semiconductor Solutions (AESS) organization has been established in AUMOVIO to develop and manufacture semiconductors in a fabless model to fulfilling strategic internal semiconductor demands.

Job Description

As an ASIC Layout Engineer (m/f/d), you will be responsible for the top-level integration of analog and mixed-signal ICs. You will drive the layout development process, ensuring robust, DRC-compliant designs with optimal area utilization. You will collaborate closely with analog circuit designers and other layout engineers to deliver high-quality silicon.

Key Responsibilities

• Responsibility for top-level layout integration of analog/mixed-signal chips (analog on top)
• Defining toplevel floorplan, padframe design and bonding diagrams in coordination with other domains
• Coordinating with other layouters and drive floorplans according to the chip top level
• Generating and integrating analog layouts at block and chip level
• Performing pin placement, parasitic extraction, and layout optimization
• Responsibility for compliance with DRC, LVS, and support tape-out activities
• Collaborating with design engineers to meet speed, area, power, DFM, ESD, and EMC requirements

Qualifications

• Academic degree in electrical engineering, microelectronics, physics or comparable qualification
• Longterm experience in analog layout design
• Proven experience in top-level layout integration
• Strong expertise in BCD technologies (65nm to 180nm)
• Deep understanding of deep submicron effects (parasitics, coupling, matching)
• Proficient in layout tools for design, DRC, LVS, and extraction
• Knowledge of analog circuit design
• Fluent English language skills (written and spoken), German language skills are a plus

Applications from severely handicapped people are welcome.

Additional Information

• Next to the interesting daily work the region around Regensburg is offering a high recreational value and quality of life.
• Profit from extensive benefits at the location such as different canteens and cafeterias, a continuing education and training, health management, physiotherapy and much more.
• We offer an attractive salary as well as the possibility of hybrid and cross-border mobile work.
• For an improved work-life balance we support you with various initiatives for a better compatibility of family and career such as flexible work time model, part-time option, sabbatical, etc.
• You can expect a highly motivated team as well as diverse topics and projects in the global environment of the automotive industry.
• We are promoting lifelong Learning combined with personal and professional development.
• You are looking for an individual working time model? We support part-time work.