Technical Co-Founder (AI Optimization for Heterogeneous Hardwares)

TN Germany; Dresden; Vor Ort; EUR 70.000 - 120.000; Vollzeit

Zusammenfassung

A leading company is seeking a Technical Co-Founder specializing in AI optimization for heterogeneous hardware. The role involves leading hardware/software co-design for custom AI accelerators and optimizing AI models for edge devices. Ideal candidates will have a strong educational background in Computer Science or Electrical Engineering, with hands-on experience in machine learning and hardware design. This is a non-paid position with equity share options.

Leistungen

Equity Share

Qualifikationen

• Experience with energy efficiency, sustainability, and high-throughput design techniques.
• Proven ability to build systems end-to-end: from prototype to deployable demo.

Aufgaben

• Lead hardware/software co-design of custom AI accelerators.
• Design and optimize AI models for low-latency, resource-constrained execution.
• Develop distributed inference strategies for AI accelerators.

Kenntnisse

Energy Efficiency

Distributed Computing

Orchestration Techniques

Machine Learning

Fluent in English

Ausbildung

Master's or PhD in Computer Science

Master's or PhD in Electrical Engineering

Tools

FPGAs

Custom ASICs

Jobbeschreibung

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Technical Co-Founder (AI Optimization for Heterogeneous Hardwares), Dresden

Client:

GREEN-DNN

Location:

Job Category:

Other

EU work permit required:

Yes

Job Reference:

0973144c7200

Job Views:

2

Posted:

11.05.2025

Expiry Date:

25.06.2025

Job Description:

Looking for a HW/SW co-design expert to help us implement the inference of AI models on resource-constraint edge devices. The workload for the target AI application will need to be distributed on a group of AI accelerators with heterogeneous hardware architecture.

Tasks

• Lead the hardware/software co-design of custom AI accelerators targeting reconfigurable architectures (FPGAs, etc.).
• Design and optimize AI models (DNNs, LLMs, etc.) for low-latency, resource-constrained, and energy-efficient execution.
• Contribute to synthesis, optimization, and deployment of AI accelerators on switches, SmartNICs, and heterogeneous HW accelerators in base stations.
• Develop distributed inference strategies for performing AI inference on resource-constrained AI accelerators.
• Lead the technical validation and prototyping with early adopters.
• Collaborate on grant writing, product roadmap, and tech strategy.
• Hire and mentor future engineers and researchers as the team grows.

Requirements

• Based in Germany, with a valid Niederlassungserlaubnis or German citizenship.
• A Master's or PhD in Computer Science, Electrical Engineering, or related fields in HW/SW Co-design.
• Experience with energy efficiency, sustainability, high-throughput, and other impactful design techniques and goals.
• Experience with distributed computing and orchestration techniques for distributed AI inference.
• Proven ability to build systems end-to-end: from prototype to deployable demo.
• Fluent in English; German is a bonus.
• A strong background and hands-on skills in the following fields:

Machine Learning (SW side):

• Optimizing DNNs, LLMs, or other AI models for embedded / edge devices.
• Quantization, pruning, knowledge distillation, or other optimization methods.

Hardware Design:

• Designing and synthesizing AI accelerators for FPGAs or custom ASICs.
• Circuit-level optimization, High-Level Synthesis (HLS), or RTL design experience.

Non-paid job at the moment; equity share at the time of founding the company is considered.