Digital IC Design Lead

IR Search BV; München; Vor Ort; EUR 80.000 - 120.000; Vollzeit

Zusammenfassung

A leading semiconductor company is seeking a Digital Design Lead in Munich. This role involves spearheading the development of embedded nonvolatile memory test chips and guiding a dynamic team in innovative projects. Ideal candidates should possess a Master's degree and extensive experience in logic design and technical leadership. Join us to drive the future of semiconductor technology!

Qualifikationen

• Over 10 years of experience in logic design for non-volatile memory technologies.
• More than 5 years in a technical leadership role.
• Proficient with EDA tools for custom and digital design.

Aufgaben

• Lead development of memory test chips and document designs.
• Collaborate on macro interfaces and requirements.
• Develop verification plans and conduct logic synthesis.

Kenntnisse

Team Leadership

Problem Solving

EDA Tools Proficiency

Ausbildung

Master's degree in Electrical Engineering

Tools

Python

C/C++

Verilog

System Verilog

Jobbeschreibung

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Headhunter in the semiconductor and high tech industry

Ready to dive into the cutting-edge world of chip technology?

Our client, the undisputed leader in the semiconductor industry is on the hunt for a dynamic Digital Design Lead to join the team in Munich. Be part of the team that powers the chips in everything from smartphones to cars!

What you'll do:

Lead a team in the development of embedded nonvolatile memory test chips and intellectual property (IP). The primary responsibilities include:

• Define, explore, and document the architecture and micro-architecture of RTL designs based on specified requirements.
• Collaborate with circuit design and product engineering teams to clarify macro interfaces, as well as testing and manufacturing requirements.
• Implement the defined architecture and micro-architecture using synthesizable Verilog or System Verilog, adhering to established coding guidelines.
• Develop and document a comprehensive verification plan, implementing it through Verilog, System Verilog, and preferably UVM.
• Demonstrate proficiency with at least one linting tool. Collaborate with the P&R team to specify SDC for synthesis and P&R, perform logic synthesis (using tools such as Design Compiler or Cadence), and conduct LEC (Logic Equivalency Checking) and STA analysis.
• Identify design and design flow problems suitable for automation. Specify and document the input specifications and automation programs/utilities. Develop programs/scripts for automation using Python, C/C++, or other common scripting languages.
• Special Tasks: Conduct Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) checks and design. Collaborate with circuit teams, product engineering, and test engineering to debug and validate the test chip.

Who we're looking for:

A driven professional with:

• Master's degree or above in Electrical Engineering or a related field.
• Over 10 years of experience in logic design or circuit design for non-volatile memory technologies, including flash memory, RRAM, MRAM, or PCRAM.
• More than 5 years of experience in a technical leadership role, demonstrating strong team leadership and problem-solving skills.
• Proficient in using EDA tools and methodologies for both custom and digital design of non-volatile memory.

Interested?

Contact Anton van Rossum at [phone] or [e-mail].

Seize this opportunity and help build the future of technology!

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Engineering, Information Technology, and Research

• Industries

  Semiconductor Manufacturing

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