Digital Design Engineer (d/m/f)

TieTalent; Jena; Vor Ort; EUR 60.000 - 80.000; Vollzeit

Zusammenfassung

A global leader in innovative light solutions in Jena is looking for an Engineer specializing in Digital IC Design. The successful candidate will work on defining system architecture, verifying design implementations, and collaborating closely with various engineering teams. A Master's Degree in Electrical Engineering is required, alongside expertise in RTL coding and serial protocols such as I2C and SPI. Proficiency in scripting languages is a plus. Competitive compensation is offered.

Qualifikationen

• Master's Degree in Electrical Engineering or similar.
• Proficiency in block and system-level design.
• Experience in verification, synthesis, and timing analysis.

Aufgaben

• Define digital architecture per system requirements.
• Verify design implementation at block level.
• Collaborate with teams for physical implementation.

Kenntnisse

Digital IC Design

RTL coding

Serial protocols (I2C, SPI)

Scripting (Perl, Python)

Mixed-signal knowledge

Ausbildung

Master's Degree in Electrical Engineering

Tools

SystemVerilog

TCL

GNU Make

Jobbeschreibung

About

Sense the power of light

ams OSRAM is a global leader in innovative light and sensor solutions. "Sense the power of light" - our success is based on our deep understanding of the potential of light. By adding intelligence to light, we enable our customers to drive transformative applications. Our around 20,000 employees worldwide focus on innovation alongside the societal megatrends of digitalization, smart living, energy efficiency, and sustainability. Whatever your role is, you are a part of a talented team that enjoys exploring and designing new technologies.

Responsibilities

1. Define digital/system architecture as per system requirements, understand/derive specifications, design partitioning, and implement blocks in SV RTL accordingly.
2. Interact with Analog engineers; derive/define specifications and analog/digital boundary protocols.
3. Verify the design implementation at block level using block-level or top-level test benches.
4. Synthesis, scan insertion, ATPG generation, and define/write assertions in the design. Handle project design independently.
5. Collaborate with P&R engineers for physical implementation.
6. Post-silicon debug and functionality testing in the lab.
7. Engage in technical communication with customers and/or marketing; present in design reviews.
8. Define, track, and ensure schedule adherence.

Qualifications

• Master's Degree in Electrical Engineering or similar; experience in Digital IC Design ASIC development, with proficiency in block and system-level design.
• Expertise in architecture development and RTL coding, with experience handling multiple clock domains.
• Strong knowledge of serial protocols like I2C, I3C, SPI, etc., and their implementation.
• Experience in verification, synthesis, scan insertion, ATPG, timing analysis, and early design analysis, CDC (e.g., irun, Xcelium, DC, Genus, Primetime, Tempus, Tetramax, spyglass, Questa). Proficiency in scripting languages such as Perl, Shell, Tcl, Python, and GNU Make. Low-level programming in C.
• Experience collaborating with physical design teams for timing closure and successful implementation.
• Knowledge of mixed-signal blocks like ADC, DAC, and other analog blocks from a digital perspective is a plus.
• Experience in DSP and implementation of digital filters like CIC, decimation, and working with algorithms and data representation formats is a plus.
• English language proficiency is required; German language skills are a plus.

Nice-to-have Skills

• Algorithm Development
• Architecture
• C, C++
• GNU Make
• I2C, SPI
• Implementation and Design
• System Architecture
• SystemVerilog
• TCL

Work Experience

• Hardware
• System Engineer
• Software Architect

Languages

• English