Computer Scientist as Senior Staff Engineer - SPICE Simulation (f/m/div)

ZipRecruiter; Dresden; Vor Ort; EUR 75.000 - 120.000; Vollzeit

Zusammenfassung

A leading semiconductor company seeks a Senior Staff Engineer for SPICE Simulation to advance timing sign-off methods. The role involves developing strategies for chip performance and collaborating on best practices. Ideal candidates hold a technical degree and possess significant experience in timing analysis. This position offers a chance to work with cutting-edge technology in a dynamic environment focused on innovation and customer success.

Qualifikationen

• At least 5 years of experience in timing analysis and digital chip design.
• Founded experience in Static Timing Analysis and SPICE simulation.
• Advanced programming skills in Perl/Python, preferably SQL.

Aufgaben

• Develop methods for timing sign-off processes from 5nm to 130nm.
• Evaluate digital timing sign-off guidelines.
• Analyze DSM effects on performance and power.

Kenntnisse

Static Timing Analysis

SPICE simulation

Programming in Perl/Python

Hardware Description Languages

Circuit Design Understanding

Chip Design Uncertainties Knowledge

Fluent in English

German Language Skills

Ausbildung

Technical Degree in Electrical Engineering, Computer Science, or Physics

Jobbeschreibung

Job Description

Computer Scientist as Senior Staff Engineer – SPICE Simulation (f/m/div)

Unlock the Secrets of Timing Sign-Off: Join Our Team of Experts!

Are you ready to push the boundaries of digital timing sign-off? Do you have a passion for analyzing DSM effects and optimizing product performance?

We're looking for a talented professional to develop and implement cutting-edge methods for timing sign-off. If you're up for the challenge, apply now and take your skills to the next level!

In your new role, you will:

1. Develop and implement methods for timing sign-off process supporting technologies from 5nm to 130nm
2. Evaluate and update digital timing sign-off guidelines
3. Analyze DSM effects and their relevance for performance and power
4. Develop methods to predict, assess, and measure the performance of products
5. Assess and evaluate external foundry sign-off regulations
6. Be responsible for investigating observed and described effects
7. Transfer dynamic effects into static analysis methods
8. Determine and fine-tune implementation and signoff guard bands for optimal design robustness

As a Senior Staff Engineer Timing Signoff, you are committed to the customer’s concerns and prioritize them highly. You set ambitious goals and establish successful cooperation quickly.

You are best equipped for this task if you have:

• A technical degree in Electrical Engineering, Computer Science, Physics, or a similar qualification
• At least 5 years of experience in timing analysis and verification and/or digital chip design
• Founded experience in Static Timing Analysis and SPICE simulation
• Advanced programming skills in Perl/Python, preferably also in SQL
• A good understanding of hardware description languages and circuit design
• Background knowledge of uncertainties in chip design and timing verification
• Fluent communication skills in English; German is a plus

Contact: Carolina Moreira, LinkedIn #WeAreIn

Infineon is a global leader in semiconductor solutions for power systems and IoT, enabling solutions for green energy, clean mobility, and secure IoT. We drive innovation and customer success while caring for our people and empowering them to reach ambitious goals.

Join our journey to create the best Infineon for everyone. We embrace diversity and provide a working environment characterized by trust, openness, respect, and tolerance. We are committed to equal opportunities for all applicants and employees.

We look forward to receiving your resume, even if you do not meet all requirements. Please inform your recruiter if there are aspects to highlight for your participation in the interview process. Click here for more information about Infineon.