Back-End Digital Design - Mid or Senior Level

European Tech Recruit; Aachen; Vor Ort; EUR 60.000 - 90.000; Vollzeit

Zusammenfassung

Join a dynamic team as a Back-End Digital Design Engineer focusing on high-performance digital and mixed-signal ICs. You'll be developing advanced technologies in a highly collaborative environment while working on cutting-edge semiconductor projects. Ideal candidates will have significant experience in backend design and a strong educational background in Electrical Engineering.

Leistungen

Competitive compensation, including salary and equity

Flexible working arrangements

Culture encourages ownership and innovation

Qualifikationen

• Mid-Level: 3–5 years experience in digital IC design.
• Senior-Level: 6+ years experience with ownership of IP/SoC blocks.
• Hands-on experience in backend flows and physical implementation.

Aufgaben

• Develop and optimize backend flow including synthesis and P&R.
• Collaborate closely with physical design teams and ensure integration.
• Senior-Level: Mentor junior engineers and define design methodologies.

Kenntnisse

EDA tools

Low-power design techniques

Problem-solving

Clock domain crossing techniques

Ausbildung

MSc or PhD in Electrical Engineering

Tools

Cadence

Synopsys

Mentor

Jobbeschreibung

Back-End Digital Design - Mid or Senior Level

Back-End Digital Design - Mid or Senior Level

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Associate Consultant l Semiconductor, Embedded Systems, Renewable Energy

We’re seeking Back-End Digital Design Engineers with deep expertise in backend physical implementation. You’ll play a key role in the development of high-performance digital and mixed-signal ICs using advanced technology nodes such as 22FDX, FinFET, and FD-SOI processes.

We’re hiring for both Mid-Level and Senior-Level roles - depending on your experience, technical depth, and leadership abilities.

Key Responsibilities

• Develop and optimize the backend flow including synthesis, floorplanning, place-and-route (P&R), timing closure, and signoff (STA, LVS, DRC).
• Collaborate closely with physical design teams to ensure smooth handoff and integration across digital and mixed-signal domains.
• Support the seamless integration of digital blocks into analog/mixed-signal topologies.
• (Senior-Level): Take ownership of block-level architecture, mentor junior engineers, and help define design methodologies.

Your Profile

• Experienced with leading EDA tools from Cadence, Synopsys, or Mentor for logic synthesis, STA, and backend flows.
• Familiar with low-power design techniques, clock domain crossing (CDC), and hierarchical SoC architectures.
• Hands-on experience in physical implementation (floorplanning, P&R, clock tree synthesis, STA, DRC, LVS).
• Comfortable working with modern nodes such as 22FDX, 16/12nm FinFET, or similar technologies.
• Knowledge of mixed-signal integration, SoC top-level assembly, and testability techniques (DFT is a plus).
• Strong problem-solving mindset, detail-oriented, and able to work both independently and collaboratively.

Qualifications

• Mid-Level: 3–5 years of experience in digital IC design.
• Senior-Level: 6+ years, with proven ownership of IP/SoC blocks or backend flows.
• Education: MSc or PhD in Electrical Engineering, Microelectronics, or a closely related field.

On Offer

• A technically challenging role at the forefront of semiconductor innovation.
• Work on next-generation data converter ICs and wireless communication systems.
• Competitive compensation, including salary and equity (VESOP).
• A dynamic, international team culture that encourages ownership and innovation.
• Flexible working arrangements focused on outcomes, not office hours.

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Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Industries

  Semiconductor Manufacturing, Appliances, Electrical, and Electronics Manufacturing, and Software Development

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