Senior SoC Architect – Low-Power, Secure ASIC

microTECH Global LTD; Neuenburg; À distance; CHF 180 000 - 250 000; Plein temps

Résumé du poste

microTECH Global LTD is seeking a seasoned SoC Architect in Switzerland to lead the digital architecture for an advanced ASIC/SoC project. You will own processor, interconnect, memory hierarchy, clocking and power strategies, peripherals, security, and hardware/software partitioning.

Applicants should have a Master’s degree (PhD preferred) and 12+ years in digital ASIC/SoC design, with hands-on SystemVerilog/Verilog RTL experience and a track record from architecture to tape-out and production.

Qualifications

• Master’s degree required or PhD preferred in Electrical Engineering, Microelectronics or related field.
• 12+ years in digital ASIC/SoC design, integration, or architecture with hands-on RTL design (SystemVerilog/Verilog).
• Experience owning a complex low-power SoC from architecture through tape-out and production.
• Deep knowledge of low-power digital design: clock/power gating, retention, voltage domains, memory optimization.

Responsabilités

• Own the digital SoC architecture: processor, interconnect, memory hierarchy, clock/reset, power domains and modes, peripherals, security, debug, test, and HW/SW partitioning
• Translate product requirements into architecture specifications, interfaces, verification objectives, and budgets for power, performance, area, cost, and risk
• Drive digital ASIC decisions: IP selection, RTL architecture, low-power intent, CDC/RDC, DFT, and implementation constraints
• Align Digital Design, Verification, IC Integration, software, validation, test, memory, analog/RF, CAD/PDK, package, and manufacturing teams
• Lead architecture reviews and change control; support tape-out, silicon bring-up, qualification, yield improvement, and production issue resolution

Connaissances

RTL design (SystemVerilog)

Low-power digital design

ASIC/SoC architecture

Memory optimization

Security

HW/SW partitioning

Clock/Power domains

Formation

Master’s in Electrical Engineering / Microelectronics, PhD preferred

Description du poste

microTECH Global LTD is seeking a seasoned SoC Architect in Switzerland to lead the digital architecture for an advanced ASIC/SoC project. You will own processor, interconnect, memory hierarchy, clocking and power strategies, peripherals, security, and hardware/software partitioning.

Applicants should have a Master’s degree (PhD preferred) and 12+ years in digital ASIC/SoC design, with hands-on SystemVerilog/Verilog RTL experience and a track record from architecture to tape-out and production.