Senior Digital Design Engineer — High-Speed AI Hardware

Kandou Bus SA; Lausanne; Vor Ort; GBP 110.000 - 137.000; Vollzeit

Zusammenfassung

Kandou seeks a Digital Design Engineer to define analog-to-digital interfaces, perform RTL design with DFT basics, and drive verification in a high-speed digital circuit environment. You will work closely with verification and analog/mixed-signal teams to deliver silicon-ready designs.

Responsibilities include timing analysis, block-level spec development, post-silicon bring-up support, and collaboration with customers for IP/chip integration. Strong Cadence experience is valued.

Qualifikationen

• 5–10 years’ experience in digital design of key circuits in multi-Gigabit serial data-link transceivers
• Deep-submicron CMOS technologies experience
• Proven experience in complex digital design and verification of data processing systems
• Experience in design and verification of complex regulation systems (configuration, calibration, dynamic adaptation)
• Experience with industry-standard design EDA tools for design, simulation, verification
• Experience with multi-Gigabit serial data transceivers is highly desirable
• Exposure to Cadence toolset is preferred

Aufgaben

• Concept definition and analog-to-digital interface specification
• RTL design with basics of DFT and IP verification
• Logic synthesis and timing analysis
• Collaborate with verification and analog/mixed-signal designers
• Develop block-level specs for very high-speed digital circuits meeting system targets
• Design and verification of high-speed digital circuits
• Support post-silicon lab bring-up, debug, and productization
• Understand high-speed serial protocols (USB4, PCIe)
• Coordinate with IP and chip-level integration
• Manage workload and report to management and customers

Kenntnisse

Digital circuit design

HDL programming (Verilog/VHDL)

Scripting (Python)

Analytical thinking

Team player

Ausbildung

Masters or Ph.D. in E.E., Communications or related

MSc in electronics/electrical engineering

Tools

Cadence toolset

EDA tools

Verilog/VHDL simulators

Jobbeschreibung

Kandou seeks a Digital Design Engineer to define analog-to-digital interfaces, perform RTL design with DFT basics, and drive verification in a high-speed digital circuit environment. You will work closely with verification and analog/mixed-signal teams to deliver silicon-ready designs.

Responsibilities include timing analysis, block-level spec development, post-silicon bring-up support, and collaboration with customers for IP/chip integration. Strong Cadence experience is valued.